Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze
authorTom Rini <trini@konsulko.com>
Fri, 11 May 2018 15:45:28 +0000 (11:45 -0400)
committerTom Rini <trini@konsulko.com>
Fri, 11 May 2018 15:45:28 +0000 (11:45 -0400)
Xilinx changes for v2018.07

microblaze:
- Align defconfig

zynq:
- Rework fpga initialization and cpuinfo handling

zynqmp:
- Add ZynqMP R5 support
- Wire and enable watchdog on zcu100-revC
- Setup MMU map for DDR at run time
- Show board info based on DT and cleanup IDENT_STRING

zynqmp tools:
- Add read partition support
- Add initial support for Xilinx bif format for boot.bin generation

mmc:
- Fix get_timer usage on 64bit cpus
- Add support for SD3.0 UHS mode

nand-zynq:
- Add support for 16bit buswidth
- Use address cycles from onfi params

scsi:
- convert ceva sata to UCLASS_AHCI

timer:
- Add Cadence TTC for ZynqMP r5

watchdog:
- Minor cadence driver cleanup

1  2 
common/image.c
include/image.h

diff --combined common/image.c
@@@ -145,8 -145,7 +145,8 @@@ static const table_entry_t uimage_type[
        {       IH_TYPE_PBLIMAGE,   "pblimage",   "Freescale PBL Boot Image",},
        {       IH_TYPE_RAMDISK,    "ramdisk",    "RAMDisk Image",      },
        {       IH_TYPE_SCRIPT,     "script",     "Script",             },
 -      {       IH_TYPE_SOCFPGAIMAGE, "socfpgaimage", "Altera SOCFPGA preloader",},
 +      {       IH_TYPE_SOCFPGAIMAGE, "socfpgaimage", "Altera SoCFPGA CV/AV preloader",},
 +      {       IH_TYPE_SOCFPGAIMAGE_V1, "socfpgaimage_v1", "Altera SoCFPGA A10 preloader",},
        {       IH_TYPE_STANDALONE, "standalone", "Standalone Program", },
        {       IH_TYPE_UBLIMAGE,   "ublimage",   "Davinci UBL image",},
        {       IH_TYPE_MXSIMAGE,   "mxsimage",   "Freescale MXS Boot Image",},
        {       IH_TYPE_VYBRIDIMAGE, "vybridimage",  "Vybrid Boot Image", },
        {       IH_TYPE_ZYNQIMAGE,  "zynqimage",  "Xilinx Zynq Boot Image" },
        {       IH_TYPE_ZYNQMPIMAGE, "zynqmpimage", "Xilinx ZynqMP Boot Image" },
+       {       IH_TYPE_ZYNQMPBIF,  "zynqmpbif",  "Xilinx ZynqMP Boot Image (bif)" },
        {       IH_TYPE_FPGA,       "fpga",       "FPGA Image" },
        {       IH_TYPE_TEE,        "tee",        "Trusted Execution Environment Image",},
        {       IH_TYPE_FIRMWARE_IVT, "firmware_ivt", "Firmware with HABv4 IVT" },
diff --combined include/image.h
@@@ -259,7 -259,7 +259,7 @@@ enum 
        IH_TYPE_MXSIMAGE,               /* Freescale MXSBoot Image      */
        IH_TYPE_GPIMAGE,                /* TI Keystone GPHeader Image   */
        IH_TYPE_ATMELIMAGE,             /* ATMEL ROM bootable Image     */
 -      IH_TYPE_SOCFPGAIMAGE,           /* Altera SOCFPGA Preloader     */
 +      IH_TYPE_SOCFPGAIMAGE,           /* Altera SOCFPGA CV/AV Preloader */
        IH_TYPE_X86_SETUP,              /* x86 setup.bin Image          */
        IH_TYPE_LPC32XXIMAGE,           /* x86 setup.bin Image          */
        IH_TYPE_LOADABLE,               /* A list of typeless images    */
        IH_TYPE_RKSPI,                  /* Rockchip SPI image           */
        IH_TYPE_ZYNQIMAGE,              /* Xilinx Zynq Boot Image */
        IH_TYPE_ZYNQMPIMAGE,            /* Xilinx ZynqMP Boot Image */
+       IH_TYPE_ZYNQMPBIF,              /* Xilinx ZynqMP Boot Image (bif) */
        IH_TYPE_FPGA,                   /* FPGA Image */
        IH_TYPE_VYBRIDIMAGE,    /* VYBRID .vyb Image */
        IH_TYPE_TEE,            /* Trusted Execution Environment OS Image */
        IH_TYPE_FIRMWARE_IVT,           /* Firmware Image with HABv4 IVT */
        IH_TYPE_PMMC,            /* TI Power Management Micro-Controller Firmware */
        IH_TYPE_STM32IMAGE,             /* STMicroelectronics STM32 Image */
 +      IH_TYPE_SOCFPGAIMAGE_V1,        /* Altera SOCFPGA A10 Preloader */
  
        IH_TYPE_COUNT,                  /* Number of image types */
  };