char need_flush = 0;
unsigned short cntFlush = 0;
- if (bo_nexell->flags_nexell == NEXELL_BO_DMA)
+ if (bo_nexell->flags_nexell == NEXELL_BO_DMA ||
+ bo_nexell->flags_nexell == NEXELL_BO_SYSTEM_NONCONTIG)
return 1;
/* get cache state of a bo */
{
unsigned int flags = 0;
- flags = ftbm;
+ switch (ftbm) {
+ /*
+ * As default, allocate DMA buffer with physically non-contiguous
+ * and cachable attributes for Wayland clients who consider CPU
+ * access to DMA buffer.
+ */
+ case TBM_BO_DEFAULT:
+ flags = NEXELL_BO_SYSTEM_NONCONTIG_CACHEABLE;
+ break;
+ /*
+ * Nexell Display controller has no IOMMU so alloate DMA buffer
+ * with phycially contiguous memory and non-cachable attributes
+ * for SCANOUT buffer.
+ */
+ case TBM_BO_SCANOUT:
+ flags = NEXELL_BO_DMA;
+ break;
+ /*
+ * Allocate DMA buffer with physically non-contiguous
+ * and non-cachable attributes for Wayland clients
+ * who never consider CPU access to DMA buffer.
+ */
+ case TBM_BO_WC:
+ case TBM_BO_NONCACHABLE:
+ flags = NEXELL_BO_SYSTEM_NONCONTIG;
+ break;
+ default:
+ flags = NEXELL_BO_DMA;
+ break;
+ }
return flags;
}