ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.0
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Mon, 4 Mar 2019 21:50:54 +0000 (22:50 +0100)
committerMarek Vasut <marex@denx.de>
Tue, 9 Apr 2019 16:19:10 +0000 (18:19 +0200)
Synchronize R-Car Gen2 device trees with Linux 5.0,
commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
arch/arm/dts/r8a7790-lager.dts
arch/arm/dts/r8a7790-stout.dts
arch/arm/dts/r8a7790.dtsi
arch/arm/dts/r8a7791-koelsch.dts
arch/arm/dts/r8a7791-porter.dts
arch/arm/dts/r8a7791.dtsi
arch/arm/dts/r8a7792.dtsi
arch/arm/dts/r8a7793-gose.dts
arch/arm/dts/r8a7793.dtsi
arch/arm/dts/r8a7794-silk.dts
arch/arm/dts/r8a7794.dtsi

index 50312e7..7b9508e 100644 (file)
 };
 
 &lvds1 {
-       status = "okay";
-
        ports {
                port@1 {
                        lvds_connector: endpoint {
index a13a92c..7a7d3b8 100644 (file)
@@ -94,9 +94,8 @@
        status = "okay";
 
        clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
-                <&cpg CPG_MOD 726>, <&cpg CPG_MOD 725>,
                 <&osc1_clk>;
-       clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1", "dclkin.0";
+       clock-names = "du.0", "du.1", "du.2", "dclkin.0";
 
        ports {
                port@0 {
                                remote-endpoint = <&adv7511_in>;
                        };
                };
+       };
+};
+
+&lvds0 {
+       ports {
                port@1 {
                        lvds_connector0: endpoint {
                        };
                };
-               port@2 {
+       };
+};
+
+&lvds1 {
+       ports {
+               port@1 {
                        lvds_connector1: endpoint {
                        };
                };
                interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                interrupt-controller;
 
+               onkey {
+                       compatible = "dlg,da9063-onkey";
+               };
+
                rtc {
                        compatible = "dlg,da9063-rtc";
                };
index 0925bdc..5a27477 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the r8a7790 SoC
+ * Device Tree Source for the R-Car H2 (R8A77900) SoC
  *
  * Copyright (C) 2015 Renesas Electronics Corporation
  * Copyright (C) 2013-2014 Renesas Solutions Corp.
                sata0: sata@ee300000 {
                        compatible = "renesas,sata-r8a7790",
                                     "renesas,rcar-gen2-sata";
-                       reg = <0 0xee300000 0 0x2000>;
+                       reg = <0 0xee300000 0 0x200000>;
                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 815>;
                        power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
                sata1: sata@ee500000 {
                        compatible = "renesas,sata-r8a7790",
                                     "renesas,rcar-gen2-sata";
-                       reg = <0 0xee500000 0 0x2000>;
+                       reg = <0 0xee500000 0 0x200000>;
                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 814>;
                        power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
index ce22db0..e6580aa 100644 (file)
 };
 
 &lvds0 {
-       status = "okay";
-
        ports {
                port@1 {
                        lvds_connector: endpoint {
index f02036e..fefdf82 100644 (file)
 };
 
 &lvds0 {
-       status = "okay";
-
        ports {
                port@1 {
                        lvds_connector: endpoint {
index 991ac6f..6f87550 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the r8a7791 SoC
+ * Device Tree Source for the R-Car M2-W (R8A77910) SoC
  *
  * Copyright (C) 2013-2015 Renesas Electronics Corporation
  * Copyright (C) 2013-2014 Renesas Solutions Corp.
                sata0: sata@ee300000 {
                        compatible = "renesas,sata-r8a7791",
                                     "renesas,rcar-gen2-sata";
-                       reg = <0 0xee300000 0 0x2000>;
+                       reg = <0 0xee300000 0 0x200000>;
                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 815>;
                        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
                sata1: sata@ee500000 {
                        compatible = "renesas,sata-r8a7791",
                                     "renesas,rcar-gen2-sata";
-                       reg = <0 0xee500000 0 0x2000>;
+                       reg = <0 0xee500000 0 0x200000>;
                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 814>;
                        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
index 63a978e..8e9eb4b 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the r8a7792 SoC
+ * Device Tree Source for the R-Car V2H (R8A77920) SoC
  *
  * Copyright (C) 2016 Cogent Embedded Inc.
  */
                du: display@feb00000 {
                        compatible = "renesas,du-r8a7792";
                        reg = <0 0xfeb00000 0 0x40000>;
-                       reg-names = "du";
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 724>,
index 6b2f3a4..f51601a 100644 (file)
        status = "okay";
 };
 
+&cpu0 {
+       cpu0-supply = <&vdd_dvfs>;
+};
+
 &rwdt {
        timeout-sec = <60>;
        status = "okay";
                        compatible = "dlg,da9063-watchdog";
                };
        };
+
+       vdd_dvfs: regulator@68 {
+               compatible = "dlg,da9210";
+               reg = <0x68>;
+               interrupt-parent = <&irqc0>;
+               interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+
+               regulator-min-microvolt = <1000000>;
+               regulator-max-microvolt = <1000000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
 };
 
 &i2c4 {
index 620a570..bf05110 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the r8a7793 SoC
+ * Device Tree Source for the R-Car M2-N (R8A77930) SoC
  *
  * Copyright (C) 2014-2015 Renesas Electronics Corporation
  */
index daec965..60e91eb 100644 (file)
        clock-frequency = <400000>;
 };
 
+&i2c7 {
+       status = "okay";
+       clock-frequency = <100000>;
+
+       pmic@58 {
+               compatible = "dlg,da9063";
+               reg = <0x58>;
+               interrupt-parent = <&gpio3>;
+               interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
+               interrupt-controller;
+
+               onkey {
+                       compatible = "dlg,da9063-onkey";
+               };
+
+               rtc {
+                       compatible = "dlg,da9063-rtc";
+               };
+
+               wdt {
+                       compatible = "dlg,da9063-watchdog";
+               };
+       };
+};
+
 &mmcif0 {
        pinctrl-0 = <&mmcif0_pins>;
        pinctrl-names = "default";
index ea2ca4b..8d797d3 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the r8a7794 SoC
+ * Device Tree Source for the R-Car E2 (R8A77940) SoC
  *
  * Copyright (C) 2014 Renesas Electronics Corporation
  * Copyright (C) 2014 Ulrich Hecht
                du: display@feb00000 {
                        compatible = "renesas,du-r8a7794";
                        reg = <0 0xfeb00000 0 0x40000>;
-                       reg-names = "du";
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;