drm/amd/powerplay: error out on forcing clock setting not supported
authorEvan Quan <evan.quan@amd.com>
Fri, 3 Apr 2020 05:19:14 +0000 (13:19 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 8 Apr 2020 21:51:54 +0000 (17:51 -0400)
For Arcturus, forcing clock to some specific level is not supported
with 54.18 and onwards SMU firmware. As according to firmware team,
they adopt new gfx dpm tuned parameters which can cover all the use
case in a much smooth way. Thus setting through driver interface
is not needed and maybe do a disservice.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c

index 5db8c56..1ef0923 100644 (file)
@@ -794,8 +794,21 @@ static int arcturus_force_clk_levels(struct smu_context *smu,
        struct arcturus_dpm_table *dpm_table;
        struct arcturus_single_dpm_table *single_dpm_table;
        uint32_t soft_min_level, soft_max_level;
+       uint32_t smu_version;
        int ret = 0;
 
+       ret = smu_get_smc_version(smu, NULL, &smu_version);
+       if (ret) {
+               pr_err("Failed to get smu version!\n");
+               return ret;
+       }
+
+       if (smu_version >= 0x361200) {
+               pr_err("Forcing clock level is not supported with "
+                      "54.18 and onwards SMU firmwares\n");
+               return -EOPNOTSUPP;
+       }
+
        soft_min_level = mask ? (ffs(mask) - 1) : 0;
        soft_max_level = mask ? (fls(mask) - 1) : 0;
 
@@ -1512,6 +1525,38 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
        return 0;
 }
 
+static int arcturus_set_performance_level(struct smu_context *smu,
+                                         enum amd_dpm_forced_level level)
+{
+       uint32_t smu_version;
+       int ret;
+
+       ret = smu_get_smc_version(smu, NULL, &smu_version);
+       if (ret) {
+               pr_err("Failed to get smu version!\n");
+               return ret;
+       }
+
+       switch (level) {
+       case AMD_DPM_FORCED_LEVEL_HIGH:
+       case AMD_DPM_FORCED_LEVEL_LOW:
+       case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD:
+       case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK:
+       case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK:
+       case AMD_DPM_FORCED_LEVEL_PROFILE_PEAK:
+               if (smu_version >= 0x361200) {
+                       pr_err("Forcing clock level is not supported with "
+                              "54.18 and onwards SMU firmwares\n");
+                       return -EOPNOTSUPP;
+               }
+               break;
+       default:
+               break;
+       }
+
+       return smu_v11_0_set_performance_level(smu, level);
+}
+
 static void arcturus_dump_pptable(struct smu_context *smu)
 {
        struct smu_table_context *table_context = &smu->smu_table;
@@ -2285,7 +2330,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
        .get_profiling_clk_mask = arcturus_get_profiling_clk_mask,
        .get_power_profile_mode = arcturus_get_power_profile_mode,
        .set_power_profile_mode = arcturus_set_power_profile_mode,
-       .set_performance_level = smu_v11_0_set_performance_level,
+       .set_performance_level = arcturus_set_performance_level,
        /* debug (internal used) */
        .dump_pptable = arcturus_dump_pptable,
        .get_power_limit = arcturus_get_power_limit,