isl: disable CPB surface compression
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Thu, 27 Jan 2022 08:26:58 +0000 (10:26 +0200)
committerMarge Bot <emma+marge@anholt.net>
Wed, 2 Feb 2022 17:09:46 +0000 (17:09 +0000)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>

src/intel/isl/isl.c
src/intel/isl/isl_emit_cpb.c

index e16661d..bd41684 100644 (file)
@@ -2161,6 +2161,12 @@ isl_surf_supports_ccs(const struct isl_device *dev,
    if (surf->tiling == ISL_TILING_LINEAR)
       return false;
 
+   /* TODO: Disable for now, as we're not sure about the meaning of
+    * 3DSTATE_CPSIZE_CONTROL_BUFFER::CPCBCompressionEnable
+    */
+   if (isl_surf_usage_is_cpb(surf->usage))
+      return false;
+
    if (ISL_GFX_VER(dev) >= 12) {
       if (isl_surf_usage_is_stencil(surf->usage)) {
          /* HiZ and MCS aren't allowed with stencil */
index 024fba9..eeb3337 100644 (file)
@@ -96,6 +96,11 @@ isl_genX(emit_cpb_control_s)(const struct isl_device *dev, void *batch,
        * Start LOD" to 15 to prevent the hardware from trying to use them.
        */
       cpb.MipTailStartLOD        = 15;
+      /* TODO:
+       *
+       * cpb.CPCBCompressionEnable is this CCS compression? Currently disabled
+       * in isl_surf_supports_ccs() for CPB buffers.
+       */
    } else {
       cpb.SurfaceType  = SURFTYPE_NULL;
       cpb.TiledMode    = TILE64;