drm/i915: move has_dsc to runtime info
authorJani Nikula <jani.nikula@intel.com>
Fri, 19 Aug 2022 12:02:47 +0000 (15:02 +0300)
committerJani Nikula <jani.nikula@intel.com>
Wed, 24 Aug 2022 08:45:26 +0000 (11:45 +0300)
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0e2646e5fdaad2785678b4f140091b3d91b97f7e.1660910433.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_vdsc.c
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.c
drivers/gpu/drm/i915/intel_device_info.h

index ac4ba7a..d7eb1af 100644 (file)
@@ -344,7 +344,7 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
        struct drm_i915_private *i915 = to_i915(crtc->base.dev);
        enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 
-       if (!INTEL_INFO(i915)->display.has_dsc)
+       if (!RUNTIME_INFO(i915)->has_dsc)
                return false;
 
        if (DISPLAY_VER(i915) >= 12)
index 4c7c087..857e8bb 100644 (file)
@@ -833,7 +833,7 @@ static const struct intel_device_info cml_gt2_info = {
        ICL_COLORS, \
        .display.dbuf.size = 2048, \
        .display.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
-       .display.has_dsc = 1, \
+       .__runtime.has_dsc = 1, \
        .has_coherent_ggtt = false, \
        .has_logical_ring_elsq = 1
 
@@ -955,7 +955,7 @@ static const struct intel_device_info adl_s_info = {
        .__runtime.has_dmc = 1,                                                 \
        .display.has_dp_mst = 1,                                                \
        .display.has_dsb = 1,                                                   \
-       .display.has_dsc = 1,                                                   \
+       .__runtime.has_dsc = 1,                                                 \
        .__runtime.fbc_mask = BIT(INTEL_FBC_A),                                 \
        .display.has_fpga_dbg = 1,                                              \
        .__runtime.has_hdcp = 1,                                                \
index b0b37e9..0a1f97b 100644 (file)
@@ -128,6 +128,7 @@ void intel_device_info_print(const struct intel_device_info *info,
 
        drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
        drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc));
+       drm_printf(p, "has_dsc: %s\n", str_yes_no(runtime->has_dsc));
 
        drm_printf(p, "rawclk rate: %u kHz\n", runtime->rawclk_freq);
 }
@@ -408,7 +409,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
 
                if (DISPLAY_VER(dev_priv) >= 10 &&
                    (dfsm & GLK_DFSM_DISPLAY_DSC_DISABLE))
-                       info->display.has_dsc = 0;
+                       runtime->has_dsc = 0;
        }
 
        if (GRAPHICS_VER(dev_priv) == 6 && i915_vtd_active(dev_priv)) {
index 5b5d481..0ccde94 100644 (file)
@@ -181,7 +181,6 @@ enum intel_ppgtt_type {
        func(has_ddi); \
        func(has_dp_mst); \
        func(has_dsb); \
-       func(has_dsc); \
        func(has_fpga_dbg); \
        func(has_gmch); \
        func(has_hotplug); \
@@ -241,6 +240,7 @@ struct intel_runtime_info {
 
                bool has_hdcp;
                bool has_dmc;
+               bool has_dsc;
        };
 };