ich9_lpc_add_properties(lpc);
}
-static int ich9_lpc_init(PCIDevice *d)
+static void ich9_lpc_realize(PCIDevice *d, Error **errp)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
ISABus *isa_bus;
memory_region_add_subregion_overlap(pci_address_space_io(d),
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
1);
- return 0;
}
static void ich9_device_plug_cb(HotplugHandler *hotplug_dev,
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->reset = ich9_lpc_reset;
- k->init = ich9_lpc_init;
+ k->realize = ich9_lpc_realize;
dc->vmsd = &vmstate_ich9_lpc;
dc->props = ich9_lpc_properties;
k->config_write = ich9_lpc_config_write;
return isa_bus;
}
-static int
-pci_ebus_init1(PCIDevice *pci_dev)
+static void pci_ebus_realize(PCIDevice *pci_dev, Error **errp)
{
EbusState *s = DO_UPCAST(EbusState, pci_dev, pci_dev);
memory_region_init_alias(&s->bar1, OBJECT(s), "bar1", get_system_io(),
0, 0x4000);
pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->bar1);
- return 0;
}
static void ebus_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->init = pci_ebus_init1;
+ k->realize = pci_ebus_realize;
k->vendor_id = PCI_VENDOR_ID_SUN;
k->device_id = PCI_DEVICE_ID_SUN_EBUS;
k->revision = 0x01;