2014-07-26 Andrew Pinski <apinski@cavium.com>

        * config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
        from the read only register.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@213090 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1750691..1fd656a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-07-26  Andrew Pinski  <apinski@cavium.com>
+
+       * config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
+       from the read only register.
+
 2014-07-26  Richard Sandiford  <rdsandiford@googlemail.com>
 
        * ira-costs.c (find_costs_and_classes): For -O0, use the best class

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 85bf2a7..f4563d1 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3390,7 +3390,7 @@
   [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
                          (match_operand 1 "const_int_operand" "n")
                          (const_int 0))
-       (zero_extract:GPI (match_operand:GPI 2 "register_operand" "+r")
+       (zero_extract:GPI (match_operand:GPI 2 "register_operand" "r")
                          (match_dup 1)
                          (match_operand 3 "const_int_operand" "n")))]
   "!(UINTVAL (operands[1]) == 0