mmc: mtk-sd: increase the minimum bus frequency
authorWeijie Gao <weijie.gao@mediatek.com>
Tue, 20 Apr 2021 08:37:10 +0000 (16:37 +0800)
committerPeng Fan <peng.fan@nxp.com>
Tue, 22 Jun 2021 04:01:52 +0000 (12:01 +0800)
With a 48MHz input clock, the lowest bus frequency can be as low as
48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
the mmc framework take seconds to finish the initialization.

Limiting the minimum bus frequency to a slightly higher value can solve the
issue without any side effects.

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
drivers/mmc/mtk-sd.c

index 48a764be82a08c6960020c5f7642f427a6e87cbe..8599f095bcd2635b7a556a8f86a5b5c1a5498f5e 100644 (file)
 
 #define SCLK_CYCLES_SHIFT              20
 
+#define MIN_BUS_CLK                    200000
+
 #define CMD_INTS_MASK  \
        (MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
 
@@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev)
        else
                cfg->f_min = host->src_clk_freq / (4 * 4095);
 
+       if (cfg->f_min < MIN_BUS_CLK)
+               cfg->f_min = MIN_BUS_CLK;
+
        if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq)
                cfg->f_max = host->src_clk_freq;