builtins: make ARM compilation with GAS work again
authorSaleem Abdulrasool <compnerd@compnerd.org>
Sun, 27 Jul 2014 02:01:24 +0000 (02:01 +0000)
committerSaleem Abdulrasool <compnerd@compnerd.org>
Sun, 27 Jul 2014 02:01:24 +0000 (02:01 +0000)
The LLVM IAS seems to accept wide instructions for add and sub in ARM mode even
though it is not permitted.  This uses a macro to ensure that the wide modifier
is only applied when building in THUMB mode.

This repairs building with GCC/GAS in ARM mode.

llvm-svn: 214046

compiler-rt/lib/builtins/arm/udivmodsi4.S
compiler-rt/lib/builtins/arm/udivsi3.S
compiler-rt/lib/builtins/arm/umodsi3.S
compiler-rt/lib/builtins/assembly.h

index 441f48d..aaece97 100644 (file)
@@ -112,8 +112,8 @@ DEFINE_COMPILERRT_FUNCTION(__udivmodsi4)
 #define block(shift)                                                           \
        cmp     r0, r1, lsl IMM shift;                                         \
        ITT(hs);                                                               \
-       addhs.w r3, r3, IMM (1 << shift);                                      \
-       subhs.w r0, r0, r1, lsl IMM shift
+       WIDE(addhs)     r3, r3, IMM (1 << shift);                              \
+       WIDE(subhs)     r0, r0, r1, lsl IMM shift
 
        block(31)
        block(30)
index 7086a44..bb5f8a0 100644 (file)
@@ -112,8 +112,8 @@ DEFINE_COMPILERRT_FUNCTION(__udivsi3)
 #define block(shift)                                                           \
        cmp     r0, r1, lsl IMM shift;                                         \
        ITT(hs);                                                               \
-       addhs.w r3, r3, IMM (1 << shift);                                      \
-       subhs.w r0, r0, r1, lsl IMM shift
+       WIDE(addhs)     r3, r3, IMM (1 << shift);                              \
+       WIDE(subhs)     r0, r0, r1, lsl IMM shift
 
        block(31)
        block(30)
index 93614a0..eb1f441 100644 (file)
@@ -107,7 +107,7 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3)
 #define block(shift)                                                           \
        cmp     r0, r1, lsl IMM shift;                                         \
        IT(hs);                                                                \
-       subhs.w r0, r0, r1, lsl IMM shift
+       WIDE(subhs)     r0, r0, r1, lsl IMM shift
 
        block(31)
        block(30)
index 8cbd385..6a853dc 100644 (file)
 #define IT(cond)
 #define ITT(cond)
 #endif
+
+#if __ARM_ARCH_ISA_THUMB == 2
+#define WIDE(op) op.w
+#else
+#define WIDE(op) op
+#endif
 #endif
 
 #define GLUE2(a, b) a##b