Oops.
Fixes:
c8e2c6faf64 ("radeonsi: use SET_SH_REG_INDEX with index=3 for registers containing CU_EN")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
assert(state->ndw + 2 <= state->max_dw);
- if (opcode != state->last_opcode || reg != (state->last_reg + 1)) {
+ if (opcode != state->last_opcode || reg != (state->last_reg + 1) || idx != state->last_idx) {
si_pm4_cmd_begin(state, opcode);
state->pm4[state->ndw++] = reg | (idx << 28);
}
assert(reg <= UINT16_MAX);
state->last_reg = reg;
+ state->last_idx = idx;
state->pm4[state->ndw++] = val;
si_pm4_cmd_end(state, false);
}
uint16_t last_pm4;
uint16_t ndw; /* number of dwords in pm4 */
uint8_t last_opcode;
+ uint8_t last_idx;
/* For shader states only */
bool is_shader;