hack to compile re-vert and do better later
authormgross <mark.gross@intel.com>
Wed, 20 Jul 2011 00:05:41 +0000 (17:05 -0700)
committermgross <mark.gross@intel.com>
Wed, 9 Nov 2011 20:36:52 +0000 (12:36 -0800)
Change-Id: I56a6db438004ddd2d1906df9b718846bd8adbf91

drivers/idle/intel_idle.c
drivers/idle/mrst_s0i3.c

index 3afe534..3717e0c 100644 (file)
@@ -327,6 +327,8 @@ int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state)
  * This enters S0i3, C6 or C4 depending on what is currently permitted.
  * C1-C4 are handled via the normal intel_idle entry.
  */
+extern void do_s0i3(void);
+
 int intel_mid_idle(struct cpuidle_device *dev, struct cpuidle_state *state)
 {
        unsigned long ecx = 1; /* break on interrupt flag */
@@ -354,7 +356,7 @@ int intel_mid_idle(struct cpuidle_device *dev, struct cpuidle_state *state)
        if (!need_resched()) {
 #ifdef CONFIG_X86_MRST
                if (eax == -1UL) {
-                       do_s0i3();
+                       ;//do_s0i3();
                } else
 #endif         
                {
index 872f27b..f3cd85f 100644 (file)
@@ -37,7 +37,7 @@
 #include <asm/mwait.h>
 #include <asm/mrst.h>
 
-static void do_s0i3(void);
+void do_s0i3(void);
 static u64 *wakeup_ptr;
 static phys_addr_t s0i3_trampoline_phys;
 static void *s0i3_trampoline_base;
@@ -168,7 +168,7 @@ static inline void s0i3_update_wake_pointer(void)
        *wakeup_ptr = virt_to_phys(mrst_s0i3_resume);
 }
 
-static noinline void do_s0i3(void)
+noinline void do_s0i3(void)
 {
        s0i3_update_wake_pointer();
        mrst_pmu_disable_msi(); /* disable MSIs before save LAPIC */