arm.c (thumb1_reorg): Check that the comparison is against the constant 0.

2016-01-18  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm.c (thumb1_reorg): Check that the comparison is
    against the constant 0.

From-SVN: r232493

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8a1839e..79fb365 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-18  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * config/arm/arm.c (thumb1_reorg): Check that the comparison is
+       against the constant 0.
+
 2016-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 
        PR tree-optimization/68799

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 1bbaa4a..f152afa 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -17206,7 +17206,7 @@ thumb1_reorg (void)
   FOR_EACH_BB_FN (bb, cfun)
     {
       rtx dest, src;
-      rtx pat, op0, set = NULL;
+      rtx cmp, op0, op1, set = NULL;
       rtx_insn *prev, *insn = BB_END (bb);
       bool insn_clobbered = false;
 
@@ -17219,8 +17219,13 @@ thumb1_reorg (void)
        continue;
 
       /* Get the register with which we are comparing.  */
-      pat = PATTERN (insn);
-      op0 = XEXP (XEXP (SET_SRC (pat), 0), 0);
+      cmp = XEXP (SET_SRC (PATTERN (insn)), 0);
+      op0 = XEXP (cmp, 0);
+      op1 = XEXP (cmp, 1);
+
+      /* Check that comparison is against ZERO.  */
+      if (!CONST_INT_P (op1) || INTVAL (op1) != 0)
+       continue;
 
       /* Find the first flag setting insn before INSN in basic block BB.  */
       gcc_assert (insn != BB_HEAD (bb));
@@ -17260,7 +17265,7 @@ thumb1_reorg (void)
          PATTERN (prev) = gen_rtx_SET (dest, src);
          INSN_CODE (prev) = -1;
          /* Set test register in INSN to dest.  */
-         XEXP (XEXP (SET_SRC (pat), 0), 0) = copy_rtx (dest);
+         XEXP (cmp, 0) = copy_rtx (dest);
          INSN_CODE (insn) = -1;
        }
     }