arm: xilinx: Setting default i2c clock frequency to 400kHz
authorVaralaxmi Bingi <varalaxmi.bingi@amd.com>
Mon, 10 Jul 2023 12:37:27 +0000 (14:37 +0200)
committerMichal Simek <michal.simek@amd.com>
Fri, 21 Jul 2023 07:00:38 +0000 (09:00 +0200)
Setting default i2c clock frequency for Zynq and ZynqMP to maximum rate of
400kHz. Current default value is 100kHz.

Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fb46fe911a68b79c8e4d150ca90c4e94eb5fb9e1.1688992653.git.michal.simek@amd.com
arch/arm/dts/zynq-7000.dtsi
arch/arm/dts/zynqmp.dtsi

index 97a9e49..8c6eafe 100644 (file)
                        clocks = <&clkc 38>;
                        interrupt-parent = <&intc>;
                        interrupts = <0 25 4>;
+                       clock-frequency = <400000>;
                        reg = <0xe0004000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        clocks = <&clkc 39>;
                        interrupt-parent = <&intc>;
                        interrupts = <0 48 4>;
+                       clock-frequency = <400000>;
                        reg = <0xe0005000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <0>;
index c9640c4..5f1e163 100644 (file)
                        status = "disabled";
                        interrupt-parent = <&gic>;
                        interrupts = <0 17 4>;
+                       clock-frequency = <400000>;
                        reg = <0x0 0xff020000 0x0 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        interrupt-parent = <&gic>;
                        interrupts = <0 18 4>;
+                       clock-frequency = <400000>;
                        reg = <0x0 0xff030000 0x0 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <0>;