storage: emmc: Set core_phase to 2 for HS200 mode [1/1]

PD#TV-2112

Problem:
eMMC timing test failed on item tISU

Solution:
set core_phase to 2 for HS200 busmode

Verify:
TL1-T962X2_X301

Change-Id: I1025b6b6b66b2591b7a8faca68ff1852eeb9b85c
Signed-off-by: long yu <long.yu@amlogic.com>

diff --git a/drivers/amlogic/mmc/aml_sd_emmc.c b/drivers/amlogic/mmc/aml_sd_emmc.c
index a25e742..2a1626c 100644 (file)
--- a/drivers/amlogic/mmc/aml_sd_emmc.c
+++ b/drivers/amlogic/mmc/aml_sd_emmc.c
@@ -3577,7 +3577,7 @@ static struct meson_mmc_data mmc_data_tl1 = {
        .sdmmc.init.rx_phase = 0,
        .sdmmc.hs.core_phase = 3,
        .sdmmc.ddr.core_phase = 2,
-       .sdmmc.hs2.core_phase = 3,
+       .sdmmc.hs2.core_phase = 2,
        .sdmmc.hs4.tx_delay = 0,
        .sdmmc.sd_hs.core_phase = 2,
        .sdmmc.sdr104.core_phase = 2,