drm/i915: move has_pooled_eu to runtime info

If it's modified runtime, it's runtime info.

Curiously, the flag was never initialized statically.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/db6d47abd87c74ae5f5be1cda62af13518c896fb.1660910433.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c
index c6d3050604c89d4f71a770175379e72b245a31aa..66f21c735d548a5301773cdb12cda9dae319bde2 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_sseu.c
+++ b/drivers/gpu/drm/i915/gt/intel_sseu.c
@@ -382,7 +382,6 @@ static void cherryview_sseu_info_init(struct intel_gt *gt)
 static void gen9_sseu_info_init(struct intel_gt *gt)
 {
        struct drm_i915_private *i915 = gt->i915;
-       struct intel_device_info *info = mkwrite_device_info(i915);
        struct sseu_dev_info *sseu = &gt->info.sseu;
        struct intel_uncore *uncore = gt->uncore;
        u32 fuse2, eu_disable, subslice_mask;
@@ -471,10 +470,10 @@ static void gen9_sseu_info_init(struct intel_gt *gt)
 
        if (IS_GEN9_LP(i915)) {
 #define IS_SS_DISABLED(ss)     (!(sseu->subslice_mask.hsw[0] & BIT(ss)))
-               info->has_pooled_eu = hweight8(sseu->subslice_mask.hsw[0]) == 3;
+               RUNTIME_INFO(i915)->has_pooled_eu = hweight8(sseu->subslice_mask.hsw[0]) == 3;
 
                sseu->min_eu_in_pool = 0;
-               if (info->has_pooled_eu) {
+               if (HAS_POOLED_EU(i915)) {
                        if (IS_SS_DISABLED(2) || IS_SS_DISABLED(0))
                                sseu->min_eu_in_pool = 3;
                        else if (IS_SS_DISABLED(1))

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 40c4195526c704a4301d91bb590e8603d7f19bab..ea2b549c9458d78b07036f57110619eda068240e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1313,7 +1313,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_GT_UC(dev_priv)    (INTEL_INFO(dev_priv)->has_gt_uc)
 
-#define HAS_POOLED_EU(dev_priv)        (INTEL_INFO(dev_priv)->has_pooled_eu)
+#define HAS_POOLED_EU(dev_priv)        (RUNTIME_INFO(dev_priv)->has_pooled_eu)
 
 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)    (INTEL_INFO(dev_priv)->has_global_mocs)
 

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 0efbd8f5fe0e43485f4306c6067889bbed9b948d..21a6ccd7c4075fc478ee540ba13b4bf04abcf12f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -120,6 +120,8 @@ void intel_device_info_print(const struct intel_device_info *info,
        DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG);
 #undef PRINT_FLAG
 
+       drm_printf(p, "has_pooled_eu: %s\n", str_yes_no(runtime->has_pooled_eu));
+
 #define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, str_yes_no(info->display.name))
        DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
 #undef PRINT_FLAG

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index c49d1677e21b1cc3f2672e73fe7fd923de559241..c5b63691d5ef5b6732ef81bc52f00338e23dfbc7 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -164,7 +164,6 @@ enum intel_ppgtt_type {
        func(has_media_ratio_mode); \
        func(has_mslice_steering); \
        func(has_one_eu_per_fuse_bit); \
-       func(has_pooled_eu); \
        func(has_pxp); \
        func(has_rc6); \
        func(has_rc6p); \
@@ -226,6 +225,8 @@ struct intel_runtime_info {
        enum intel_ppgtt_type ppgtt_type;
        unsigned int ppgtt_size; /* log2, e.g. 31/32/48 bits */
 
+       bool has_pooled_eu;
+
        /* display */
        struct {
                u8 num_sprites[I915_MAX_PIPES];