+2018-03-11 Monk Chiang <sh.chiang04@gmail.com>
+ Kito Cheng <kito.cheng@gmail.com>
+ Chung-Ju Wu <jasonwucj@gmail.com>
+
+ * config/nds32/constants.md (unspec_element): Add UNSPEC_FFB,
+ UNSPEC_FFMISM and UNSPEC_FLMISM.
+ * config/nds32/nds32-intrinsic.c (bdesc_2arg): Add builtin description
+ for ffb, ffmism and flmism.
+ * config/nds32/nds32-intrinsic.md (unspec_ffb): Define new pattern.
+ (unspec_ffmism): Ditto.
+ (unspec_flmism): Ditto.
+ (nds32_expand_builtin_impl): Check if string extension is available.
+ * config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FFB,
+ NDS32_BUILTIN_FFMISM and NDS32_BUILTIN_FLMISM.
+
2018-03-10 Vladimir Makarov <vmakarov@redhat.com>
Reverting patch:
;; The unpec operation index.
(define_c_enum "unspec_element" [
+ UNSPEC_FFB
+ UNSPEC_FFMISM
+ UNSPEC_FLMISM
UNSPEC_UALOAD_HW
UNSPEC_UALOAD_W
UNSPEC_UALOAD_DW
/* Intrinsics that take two arguments. */
static struct builtin_description bdesc_2arg[] =
{
+ NDS32_BUILTIN(unspec_ffb, "ffb", FFB)
+ NDS32_BUILTIN(unspec_ffmism, "ffmsim", FFMISM)
+ NDS32_BUILTIN(unspec_flmism, "flmism", FLMISM)
NDS32_NO_TARGET_BUILTIN(unspec_volatile_mtsr, "mtsr", MTSR)
NDS32_NO_TARGET_BUILTIN(unspec_volatile_mtusr, "mtusr", MTUSR)
NDS32_NO_TARGET_BUILTIN(unaligned_store_hw, "unaligned_store_hw", UASTORE_HW)
unsigned i;
struct builtin_description *d;
+ switch (fcode)
+ {
+ /* String Extension */
+ case NDS32_BUILTIN_FFB:
+ case NDS32_BUILTIN_FFMISM:
+ case NDS32_BUILTIN_FLMISM:
+ if (!TARGET_EXT_STRING)
+ {
+ error ("don't support string extension instructions");
+ return NULL_RTX;
+ }
+ break;
+
+ default:
+ break;
+ }
+
/* Since there are no result and operands, we can simply emit this rtx. */
switch (fcode)
{
[(set_attr "type" "misc")]
)
+;; String Extension
+
+(define_insn "unspec_ffb"
+ [(set (match_operand:SI 0 "register_operand" "=r, r")
+ (unspec:SI [(match_operand:SI 1 "register_operand" "r, r")
+ (match_operand:SI 2 "nonmemory_operand" "Iu08, r")] UNSPEC_FFB))]
+ ""
+ "@
+ ffbi\t%0, %1, %2
+ ffb\t%0, %1, %2"
+ [(set_attr "type" "alu")
+ (set_attr "length" "4")]
+)
+
+(define_insn "unspec_ffmism"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")
+ (match_operand:SI 2 "register_operand" "r")] UNSPEC_FFMISM))]
+ ""
+ "ffmism\t%0, %1, %2"
+ [(set_attr "type" "alu")
+ (set_attr "length" "4")]
+)
+
+(define_insn "unspec_flmism"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")
+ (match_operand:SI 2 "register_operand" "r")] UNSPEC_FLMISM))]
+ ""
+ "flmism\t%0, %1, %2"
+ [(set_attr "type" "alu")
+ (set_attr "length" "4")]
+)
+
;;Unaligned Load/Store
(define_expand "unaligned_load_hw"
NDS32_BUILTIN_MTUSR,
NDS32_BUILTIN_SETGIE_EN,
NDS32_BUILTIN_SETGIE_DIS,
+ NDS32_BUILTIN_FFB,
+ NDS32_BUILTIN_FFMISM,
+ NDS32_BUILTIN_FLMISM,
NDS32_BUILTIN_UALOAD_HW,
NDS32_BUILTIN_UALOAD_W,
NDS32_BUILTIN_UALOAD_DW,