Missing testcase files for last commit.
authorJim Wilson <jimw@sifive.com>
Wed, 14 Mar 2018 23:05:44 +0000 (16:05 -0700)
committerJim Wilson <jimw@sifive.com>
Wed, 14 Mar 2018 23:05:44 +0000 (16:05 -0700)
gas/testsuite/gas/riscv/insn.d [new file with mode: 0644]
gas/testsuite/gas/riscv/insn.s [new file with mode: 0644]

diff --git a/gas/testsuite/gas/riscv/insn.d b/gas/testsuite/gas/riscv/insn.d
new file mode 100644 (file)
index 0000000..3d1049b
--- /dev/null
@@ -0,0 +1,51 @@
+#as: -march=rv32ic
+#objdump: -dr
+
+.*:[   ]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[      ]+0:[   ]+00c58533[     ]+add[  ]+a0,a1,a2
+[      ]+4:[   ]+00d58513[     ]+addi[         ]+a0,a1,13
+[      ]+8:[   ]+00a58567[     ]+jalr[         ]+a0,10\(a1\)
+[      ]+c:[   ]+00458503[     ]+lb[   ]+a0,4\(a1\)
+[      ]+10:[  ]+feb508e3[     ]+beq[  ]+a0,a1,0 \<target\>
+[      ]+10: R_RISCV_BRANCH[   ]+target
+[      ]+14:[  ]+00a58223[     ]+sb[   ]+a0,4\(a1\)
+[      ]+18:[  ]+00fff537[     ]+lui[  ]+a0,0xfff
+[      ]+1c:[  ]+fe5ff56f[     ]+jal[  ]+a0,0 \<target\>
+[      ]+1c: R_RISCV_JAL[      ]+target
+[      ]+20:[  ]+0511[         ]+addi[         ]+a0,a0,4
+[      ]+22:[  ]+852e[         ]+mv[   ]+a0,a1
+[      ]+24:[  ]+002c[         ]+addi[         ]+a1,sp,8
+[      ]+26:[  ]+dde9[         ]+beqz[         ]+a1,0 \<target\>
+[      ]+26: R_RISCV_RVC_BRANCH[       ]+target
+[      ]+28:[  ]+bfe1[         ]+j[    ]+0 \<target\>
+[      ]+28: R_RISCV_RVC_JUMP[ ]+target
+[      ]+2a:[  ]+00c58533[     ]+add[  ]+a0,a1,a2
+[      ]+2e:[  ]+00d58513[     ]+addi[         ]+a0,a1,13
+[      ]+32:[  ]+00a58567[     ]+jalr[         ]+a0,10\(a1\)
+[      ]+36:[  ]+00458503[     ]+lb[   ]+a0,4\(a1\)
+[      ]+3a:[  ]+fcb503e3[     ]+beq[  ]+a0,a1,0 \<target\>
+[      ]+3a: R_RISCV_BRANCH[   ]+target
+[      ]+3e:[  ]+00a58223[     ]+sb[   ]+a0,4\(a1\)
+[      ]+42:[  ]+00fff537[     ]+lui[  ]+a0,0xfff
+[      ]+46:[  ]+fbbff56f[     ]+jal[  ]+a0,0 \<target\>
+[      ]+46: R_RISCV_JAL[      ]+target
+[      ]+4a:[  ]+0511[         ]+addi[         ]+a0,a0,4
+[      ]+4c:[  ]+852e[         ]+mv[   ]+a0,a1
+[      ]+4e:[  ]+002c[         ]+addi[         ]+a1,sp,8
+[      ]+50:[  ]+d9c5[         ]+beqz[         ]+a1,0 \<target\>
+[      ]+50: R_RISCV_RVC_BRANCH[       ]+target
+[      ]+52:[  ]+b77d[         ]+j[    ]+0 \<target\>
+[      ]+52: R_RISCV_RVC_JUMP[ ]+target
+[      ]+54:[  ]+68c58543[     ]+fmadd.s[      ]+fa0,fa1,fa2,fa3,rne
+[      ]+58:[  ]+00c58533[     ]+add[  ]+a0,a1,a2
+[      ]+5c:[  ]+00c58533[     ]+add[  ]+a0,a1,a2
+[      ]+60:[  ]+00c58533[     ]+add[  ]+a0,a1,a2
+[      ]+64:[  ]+00c58533[     ]+add[  ]+a0,a1,a2
+[      ]+68:[  ]+00c58533[     ]+add[  ]+a0,a1,a2
+[      ]+6c:[  ]+00c58533[     ]+add[  ]+a0,a1,a2
+[      ]+70:[  ]+00c58533[     ]+add[  ]+a0,a1,a2
diff --git a/gas/testsuite/gas/riscv/insn.s b/gas/testsuite/gas/riscv/insn.s
new file mode 100644 (file)
index 0000000..7ad1753
--- /dev/null
@@ -0,0 +1,39 @@
+target:
+       .insn r  0x33,  0,  0, a0, a1, a2
+       .insn i  0x13,  0, a0, a1, 13
+       .insn i  0x67,  0, a0, 10(a1)
+       .insn s   0x3,  0, a0, 4(a1)
+       .insn sb 0x63,  0, a0, a1, target
+       .insn sb 0x23,  0, a0, 4(a1)
+       .insn u  0x37, a0, 0xfff
+       .insn uj 0x6f, a0, target
+
+       .insn ci 0x1, 0x0, a0, 4
+       .insn cr 0x2, 0x8, a0, a1
+       .insn ciw 0x0, 0x0, a1, 1
+       .insn cb 0x1, 0x6, a1, target
+       .insn cj 0x1, 0x5, target
+
+       .insn r  OP,  0,  0, a0, a1, a2
+       .insn i  OP_IMM,  0, a0, a1, 13
+       .insn i  JALR,  0, a0, 10(a1)
+       .insn s  LOAD,  0, a0, 4(a1)
+       .insn sb BRANCH,  0, a0, a1, target
+       .insn sb STORE,  0, a0, 4(a1)
+       .insn u  LUI, a0, 0xfff
+       .insn uj JAL, a0, target
+
+       .insn ci C1, 0x0, a0, 4
+       .insn cr C2, 0x8, a0, a1
+       .insn ciw C0, 0x0, a1, 1
+       .insn cb C1, 0x6, a1, target
+       .insn cj C1, 0x5, target
+
+       .insn r MADD, 0, 0, a0, a1, a2, a3
+       .insn r  0x33,  0,  0, fa0, a1, a2
+       .insn r  0x33,  0,  0, a0, fa1, a2
+       .insn r  0x33,  0,  0, fa0, fa1, a2
+       .insn r  0x33,  0,  0, a0, a1, fa2
+       .insn r  0x33,  0,  0, fa0, a1, fa2
+       .insn r  0x33,  0,  0, a0, fa1, fa2
+       .insn r  0x33,  0,  0, fa0, fa1, fa2