On Cell/B.E. multi-architecture debugging we use a "merged" address space
that encodes both the main PowerPC address space and the local store address
spaces of all active SPUs. This will always occupy 64 bits.
However, gdbarch_addr_bit is set to 32 on SPU, and may be set to 32 as well
on PowerPC. Since the new gdbarch_significant_addr_bit defaults to the
value of gdbarch_addr_bit, this means addresses may be improperly truncated.
Work around this problem by explicitly setting gdbarch_significant_addr_bit
to 64 both for the SPU target and also for PowerPC target that support
Cell/B.E. execution.
gdb/ChangeLog:
2017-12-20 Ulrich Weigand <uweigand@de.ibm.com>
* spu-tdep.c (spu_gdbarch_init): Set set_gdbarch_significant_addr_bit
to 64 bits.
(ppc_linux_init_abi): Likewise, if Cell/B.E. is supported.
+2017-12-20 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * spu-tdep.c (spu_gdbarch_init): Set set_gdbarch_significant_addr_bit
+ to 64 bits.
+ (ppc_linux_init_abi): Likewise, if Cell/B.E. is supported.
+
2017-12-18 Joel Brobecker <brobecker@adacore.com>
* ada-lang.c (ada_to_fixed_type_1): Rethrow errors with
/* Cell/B.E. cross-architecture unwinder support. */
frame_unwind_prepend_unwinder (gdbarch, &ppu2spu_unwind);
+
+ /* We need to support more than "addr_bit" significant address bits
+ in order to support SPUADDR_ADDR encoded values. */
+ set_gdbarch_significant_addr_bit (gdbarch, 64);
}
set_gdbarch_displaced_step_location (gdbarch,
set_gdbarch_address_class_name_to_type_flags
(gdbarch, spu_address_class_name_to_type_flags);
+ /* We need to support more than "addr_bit" significant address bits
+ in order to support SPUADDR_ADDR encoded values. */
+ set_gdbarch_significant_addr_bit (gdbarch, 64);
/* Inferior function calls. */
set_gdbarch_call_dummy_location (gdbarch, ON_STACK);