hdmitx: fix wrong 420 valid_mode [1/1]
authorZongdong Jiao <zongdong.jiao@amlogic.com>
Fri, 12 Apr 2019 08:58:08 +0000 (16:58 +0800)
committerLuan Yuan <luan.yuan@amlogic.com>
Mon, 15 Apr 2019 08:00:58 +0000 (16:00 +0800)
PD#SWPL-6896

Problem:
In the HF1-31 Iter 03 test, the Rx EDID's max tmds clock is 600MHz,
and it doesn't claim that it supports Y420 modes. But
echo 2160p60hz,420,8bit > /sys/class/amhdmitx/amhdmitx0/valid_mode
'cat valid_mode' will get 1.

Solution:
Add Y420 8bit check

Verify:
G12/U212

Change-Id: I0a128eb33aeb2b4bcbf253eff49e9c5186386af1
Signed-off-by: Zongdong Jiao <zongdong.jiao@amlogic.com>
drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_edid.c

index 96906ef..466c55e 100644 (file)
@@ -2315,6 +2315,29 @@ const char *hdmitx_edid_vic_to_string(enum hdmi_vic vic)
        return disp_str;
 }
 
+static bool is_rx_support_y420(struct hdmitx_dev *hdev)
+{
+       enum hdmi_vic vic = HDMI_Unknown;
+
+       vic = hdmitx_edid_get_VIC(hdev, "2160p60hz420", 0);
+       if (vic != HDMI_Unknown)
+               return 1;
+
+       vic = hdmitx_edid_get_VIC(hdev, "2160p50hz420", 0);
+       if (vic != HDMI_Unknown)
+               return 1;
+
+       vic = hdmitx_edid_get_VIC(hdev, "smpte60hz420", 0);
+       if (vic != HDMI_Unknown)
+               return 1;
+
+       vic = hdmitx_edid_get_VIC(hdev, "smpte50hz420", 0);
+       if (vic != HDMI_Unknown)
+               return 1;
+
+       return 0;
+}
+
 /* For some TV's EDID, there maybe exist some information ambiguous.
  * Such as EDID declears support 2160p60hz(Y444 8bit), but no valid
  * Max_TMDS_Clock2 to indicate that it can support 5.94G signal.
@@ -2455,6 +2478,8 @@ bool hdmitx_edid_check_valid_mode(struct hdmitx_dev *hdev,
                return valid;
        }
        if (para->cs == COLORSPACE_YUV420) {
+               if (!is_rx_support_y420(hdev))
+                       return 0;
                if (pRXCap->dc_30bit_420)
                        rx_y420_max_dc = COLORDEPTH_30B;
                if (pRXCap->dc_36bit_420)