arm: socfpga: arria10: Enable cache driver in SPL
authorLey Foon Tan <ley.foon.tan@intel.com>
Tue, 7 Apr 2020 07:43:14 +0000 (15:43 +0800)
committerMarek Vasut <marex@denx.de>
Mon, 13 Apr 2020 11:49:51 +0000 (13:49 +0200)
Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE
to enable cache driver in SPL.

This fixed error below in SPL:
cache controller driver NOT found!

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
arch/arm/dts/socfpga_arria10-u-boot.dtsi
arch/arm/mach-socfpga/Kconfig

index 0db358c..6ff1ea6 100644 (file)
        reset-names = "i2c";
 };
 
+&L2 {
+       u-boot,dm-pre-reloc;
+};
+
 &l4_mp_clk {
        u-boot,dm-pre-reloc;
 };
index 38d6c1b..a3699e8 100644 (file)
@@ -46,6 +46,7 @@ config TARGET_SOCFPGA_ARRIA10
        bool
        select SPL_ALTERA_SDRAM
        select SPL_BOARD_INIT if SPL
+       select SPL_CACHE if SPL
        select CLK
        select SPL_CLK if SPL
        select DM_I2C