bool autoneg,
bool autoneg_wait_to_complete);
static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw);
-static s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw, u32 *speed,
- bool *link_up);
static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
bool autoneg,
bool autoneg_wait_to_complete);
hw->mac.num_tx_queues = IXGBE_82598_MAX_RX_QUEUES;
hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES;
+ /* PHY ops are filled in by default properly for Fiber only */
+ if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) {
+ hw->mac.ops.setup_link = &ixgbe_setup_copper_link_82598;
+ hw->mac.ops.setup_link_speed = &ixgbe_setup_copper_link_speed_82598;
+ hw->mac.ops.get_link_settings =
+ &ixgbe_get_copper_link_settings_82598;
+
+ /* Call PHY identify routine to get the phy type */
+ ixgbe_identify_phy(hw);
+
+ switch (hw->phy.type) {
+ case ixgbe_phy_tn:
+ hw->phy.ops.setup_link = &ixgbe_setup_tnx_phy_link;
+ hw->phy.ops.check_link = &ixgbe_check_tnx_phy_link;
+ hw->phy.ops.setup_link_speed =
+ &ixgbe_setup_tnx_phy_link_speed;
+ break;
+ default:
+ break;
+ }
+ }
+
return 0;
}
autoc_reg |= hw->mac.link_mode_select;
IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
+ IXGBE_WRITE_FLUSH(hw);
msleep(50);
}
* ixgbe_hw This will write the AUTOC register based on the new
* stored values
*/
- hw->phy.ops.setup(hw);
+ hw->mac.ops.setup_link(hw);
}
return status;
**/
static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw)
{
- s32 status;
- u32 speed = 0;
- bool link_up = false;
-
- /* Set up MAC */
- hw->phy.ops.setup(hw);
+ s32 status = 0;
/* Restart autonegotiation on PHY */
- status = hw->phy.ops.setup(hw);
-
- /* Synchronize MAC to PHY speed */
- if (status == 0)
- status = hw->phy.ops.check(hw, &speed, &link_up);
-
- return status;
-}
+ if (hw->phy.ops.setup_link)
+ status = hw->phy.ops.setup_link(hw);
-/**
- * ixgbe_check_copper_link_82598 - Syncs MAC & PHY link settings
- * @hw: pointer to hardware structure
- * @speed: pointer to link speed
- * @link_up: true if link is up, false otherwise
- *
- * Reads the mac link, phy link, and synchronizes the MAC to PHY.
- **/
-static s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw, u32 *speed,
- bool *link_up)
-{
- s32 status;
- u32 phy_speed = 0;
- bool phy_link = false;
+ /* Set MAC to KX/KX4 autoneg, which defaultis to Parallel detection */
+ hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
+ hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
- /* This is the speed and link the MAC is set at */
- hw->phy.ops.check(hw, speed, link_up);
-
- /*
- * Check current speed and link status of the PHY register.
- * This is a vendor specific register and may have to
- * be changed for other copper PHYs.
- */
- status = hw->phy.ops.check(hw, &phy_speed, &phy_link);
-
- if ((status == 0) && (phy_link)) {
- /*
- * Check current link status of the MACs link's register
- * matches that of the speed in the PHY register
- */
- if (*speed != phy_speed) {
- /*
- * The copper PHY requires 82598 attach type to be XAUI
- * for 10G and BX for 1G
- */
- hw->mac.link_attach_type =
- (IXGBE_AUTOC_10G_XAUI | IXGBE_AUTOC_1G_BX);
-
- /* Synchronize the MAC speed to the PHY speed */
- status = hw->phy.ops.setup_speed(hw, phy_speed, false,
- false);
- if (status == 0)
- hw->phy.ops.check(hw, speed, link_up);
- else
- status = IXGBE_ERR_LINK_SETUP;
- }
- } else {
- *link_up = phy_link;
- }
+ /* Set up MAC */
+ hw->mac.ops.setup_link(hw);
return status;
}
bool autoneg,
bool autoneg_wait_to_complete)
{
- s32 status;
- bool link_up = 0;
+ s32 status = 0;
/* Setup the PHY according to input speed */
- status = hw->phy.ops.setup_speed(hw, speed, autoneg,
- autoneg_wait_to_complete);
+ if (hw->phy.ops.setup_link_speed)
+ status = hw->phy.ops.setup_link_speed(hw, speed, autoneg,
+ autoneg_wait_to_complete);
+
+ /* Set MAC to KX/KX4 autoneg, which defaults to Parallel detection */
+ hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
+ hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
- /* Synchronize MAC to PHY speed */
- if (status == 0)
- status = hw->phy.ops.check(hw, &speed, &link_up);
+ /* Set up MAC */
+ hw->mac.ops.setup_link(hw);
return status;
}
static struct ixgbe_mac_operations mac_ops_82598 = {
.reset = &ixgbe_reset_hw_82598,
.get_media_type = &ixgbe_get_media_type_82598,
+ .setup_link = &ixgbe_setup_mac_link_82598,
+ .check_link = &ixgbe_check_mac_link_82598,
+ .setup_link_speed = &ixgbe_setup_mac_link_speed_82598,
+ .get_link_settings = &ixgbe_get_link_settings_82598,
};
-static struct ixgbe_phy_operations phy_ops_82598EB = {
- .setup = &ixgbe_setup_copper_link_82598,
- .check = &ixgbe_check_copper_link_82598,
- .setup_speed = &ixgbe_setup_copper_link_speed_82598,
- .get_settings = &ixgbe_get_copper_link_settings_82598,
-};
-
-struct ixgbe_info ixgbe_82598EB_info = {
- .mac = ixgbe_mac_82598EB,
- .get_invariants = &ixgbe_get_invariants_82598,
- .mac_ops = &mac_ops_82598,
- .phy_ops = &phy_ops_82598EB,
-};
-
-static struct ixgbe_phy_operations phy_ops_82598AT = {
- .setup = &ixgbe_setup_tnx_phy_link,
- .check = &ixgbe_check_tnx_phy_link,
- .setup_speed = &ixgbe_setup_tnx_phy_link_speed,
- .get_settings = &ixgbe_get_copper_link_settings_82598,
-};
-
-struct ixgbe_info ixgbe_82598AT_info = {
- .mac = ixgbe_mac_82598EB,
- .get_invariants = &ixgbe_get_invariants_82598,
- .mac_ops = &mac_ops_82598,
- .phy_ops = &phy_ops_82598AT,
-};
-
-static struct ixgbe_phy_operations phy_ops_82598AF = {
- .setup = &ixgbe_setup_mac_link_82598,
- .check = &ixgbe_check_mac_link_82598,
- .setup_speed = &ixgbe_setup_mac_link_speed_82598,
- .get_settings = &ixgbe_get_link_settings_82598,
-};
-
-struct ixgbe_info ixgbe_82598AF_info = {
+struct ixgbe_info ixgbe_82598_info = {
.mac = ixgbe_mac_82598EB,
.get_invariants = &ixgbe_get_invariants_82598,
.mac_ops = &mac_ops_82598,
- .phy_ops = &phy_ops_82598AF,
};
ixgbe_clear_vfta(hw);
/* Set up link */
- hw->phy.ops.setup(hw);
+ hw->mac.ops.setup_link(hw);
/* Clear statistics registers */
ixgbe_clear_hw_cntrs(hw);
ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
ctrl_ext |= IXGBE_CTRL_EXT_NS_DIS;
IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
+ IXGBE_WRITE_FLUSH(hw);
/* Clear adapter stopped flag */
hw->adapter_stopped = false;
led_reg &= ~IXGBE_LED_MODE_MASK(index);
led_reg |= IXGBE_LED_ON << IXGBE_LED_MODE_SHIFT(index);
IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
+ IXGBE_WRITE_FLUSH(hw);
return 0;
}
led_reg &= ~IXGBE_LED_MODE_MASK(index);
led_reg |= IXGBE_LED_OFF << IXGBE_LED_MODE_SHIFT(index);
IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
+ IXGBE_WRITE_FLUSH(hw);
return 0;
}
/* Release both semaphores by writing 0 to the bits SWESMBI and SMBI */
swsm &= ~(IXGBE_SWSM_SWESMBI | IXGBE_SWSM_SMBI);
IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
+ IXGBE_WRITE_FLUSH(hw);
}
/**
}
/**
- * ixgbe_read_analog_reg8- Reads 8 bit 82598 Atlas analog register
+ * ixgbe_read_analog_reg8 - Reads 8 bit Atlas analog register
* @hw: pointer to hardware structure
* @reg: analog register to read
* @val: read value
}
/**
- * ixgbe_write_analog_reg8- Writes 8 bit Atlas analog register
+ * ixgbe_write_analog_reg8 - Writes 8 bit Atlas analog register
* @hw: pointer to hardware structure
* @reg: atlas register to write
* @val: value to write
"Copyright (c) 1999-2007 Intel Corporation.";
static const struct ixgbe_info *ixgbe_info_tbl[] = {
- [board_82598AF] = &ixgbe_82598AF_info,
- [board_82598EB] = &ixgbe_82598EB_info,
- [board_82598AT] = &ixgbe_82598AT_info,
+ [board_82598] = &ixgbe_82598_info,
};
/* ixgbe_pci_tbl - PCI Device ID Table
*/
static struct pci_device_id ixgbe_pci_tbl[] = {
{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
- board_82598AF },
+ board_82598 },
{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
- board_82598AF },
+ board_82598 },
{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
- board_82598AT },
+ board_82598 },
{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
- board_82598EB },
+ board_82598 },
/* required last entry */
{0, }
dev_err(&pdev->dev, "HW Init failed\n");
return -EIO;
}
- if (hw->phy.ops.setup_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
- false)) {
+ if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
+ false)) {
dev_err(&pdev->dev, "Link Speed setup failed\n");
return -EIO;
}
bool link_up;
u32 link_speed = 0;
- adapter->hw.phy.ops.check(&adapter->hw, &(link_speed), &link_up);
+ adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
if (link_up) {
if (!netif_carrier_ok(netdev)) {
/* Setup hw api */
memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
- memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
err = ii->get_invariants(hw);
if (err)
struct ixgbe_mac_operations {
s32 (*reset)(struct ixgbe_hw *);
enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);
+ s32 (*setup_link)(struct ixgbe_hw *);
+ s32 (*check_link)(struct ixgbe_hw *, u32 *, bool *);
+ s32 (*setup_link_speed)(struct ixgbe_hw *, u32, bool, bool);
+ s32 (*get_link_settings)(struct ixgbe_hw *, u32 *, bool *);
};
struct ixgbe_phy_operations {
- s32 (*setup)(struct ixgbe_hw *);
- s32 (*check)(struct ixgbe_hw *, u32 *, bool *);
- s32 (*setup_speed)(struct ixgbe_hw *, u32, bool, bool);
- s32 (*get_settings)(struct ixgbe_hw *, u32 *, bool *);
+ s32 (*setup_link)(struct ixgbe_hw *);
+ s32 (*check_link)(struct ixgbe_hw *, u32 *, bool *);
+ s32 (*setup_link_speed)(struct ixgbe_hw *, u32, bool, bool);
};
struct ixgbe_mac_info {
bool link_settings_loaded;
};
-
struct ixgbe_eeprom_info {
enum ixgbe_eeprom_type type;
u16 word_size;
enum ixgbe_mac_type mac;
s32 (*get_invariants)(struct ixgbe_hw *);
struct ixgbe_mac_operations *mac_ops;
- struct ixgbe_phy_operations *phy_ops;
};
struct ixgbe_hw {
projects / platform / adaptation / renesas_rcar / renesas_kernel.git / commitdiff