MIPS: mscc: jaguar2: rename pinctrl nodes
authorMichael Walle <michael@walle.cc>
Wed, 20 Apr 2022 19:50:16 +0000 (21:50 +0200)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Wed, 27 Apr 2022 08:48:59 +0000 (10:48 +0200)
The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/boot/dts/mscc/jaguar2_pcb110.dts
arch/mips/boot/dts/mscc/jaguar2_pcb111.dts
arch/mips/boot/dts/mscc/jaguar2_pcb118.dts

index d80cd68..0ea7bc5 100644 (file)
                pins = "GPIO_49";
                function = "si";
        };
-       i2cmux_pins_i: i2cmux-pins-i {
+       i2cmux_pins_i: i2cmux-pins {
                pins = "GPIO_17", "GPIO_18", "GPIO_20", "GPIO_21";
                function = "twi_scl_m";
                output-low;
        };
-       i2cmux_0: i2cmux-0 {
+       i2cmux_0: i2cmux-0-pins {
                pins = "GPIO_17";
                function = "twi_scl_m";
                output-high;
        };
-       i2cmux_1: i2cmux-1 {
+       i2cmux_1: i2cmux-1-pins {
                pins = "GPIO_18";
                function = "twi_scl_m";
                output-high;
        };
-       i2cmux_2: i2cmux-2 {
+       i2cmux_2: i2cmux-2-pins {
                pins = "GPIO_20";
                function = "twi_scl_m";
                output-high;
        };
-       i2cmux_3: i2cmux-3 {
+       i2cmux_3: i2cmux-3-pins {
                pins = "GPIO_21";
                function = "twi_scl_m";
                output-high;
index 813c5e1..05d8c6a 100644 (file)
 };
 
 &gpio {
-       i2cmux_pins_i: i2cmux-pins-i {
+       i2cmux_pins_i: i2cmux-pins {
                pins = "GPIO_17", "GPIO_18";
                function = "twi_scl_m";
                output-low;
        };
-       i2cmux_0: i2cmux-0 {
+       i2cmux_0: i2cmux-0-pins {
                pins = "GPIO_17";
                function = "twi_scl_m";
                output-high;
        };
-       i2cmux_1: i2cmux-1 {
+       i2cmux_1: i2cmux-1-pins {
                pins = "GPIO_18";
                function = "twi_scl_m";
                output-high;
        };
-       i2cmux_2: i2cmux-2 {
+       i2cmux_2: i2cmux-2-pins {
                pins = "GPIO_20";
                function = "twi_scl_m";
                output-high;
        };
-       i2cmux_3: i2cmux-3 {
+       i2cmux_3: i2cmux-3-pins {
                pins = "GPIO_21";
                function = "twi_scl_m";
                output-high;
index 27c644f..cf2cf59 100644 (file)
 };
 
 &gpio {
-       i2cmux_pins_i: i2cmux-pins-i {
+       i2cmux_pins_i: i2cmux-pins {
                pins = "GPIO_17", "GPIO_16";
                function = "twi_scl_m";
                output-low;
        };
-       i2cmux_0: i2cmux-0 {
+       i2cmux_0: i2cmux-0-pins {
                pins = "GPIO_17";
                function = "twi_scl_m";
                output-high;
        };
-       i2cmux_1: i2cmux-1 {
+       i2cmux_1: i2cmux-1-pins {
                pins = "GPIO_16";
                function = "twi_scl_m";
                output-high;