ir->base_time = tv;
ir->last_bit = 0;
- mod_timer(&ir->timer_end,
- current_jiffies + msecs_to_jiffies(30));
+ mod_timer(&ir->timer, current_jiffies + msecs_to_jiffies(30));
}
/* toggle GPIO pin 4 to reset the irq */
add_timer(&ir->timer);
} else if (ir->rc5_gpio) {
/* set timer_end for code completion */
- setup_timer(&ir->timer_end, bttv_rc5_timer_end,
- (unsigned long)ir);
+ setup_timer(&ir->timer, bttv_rc5_timer_end, (unsigned long)ir);
ir->shift_by = 1;
ir->start = 3;
ir->addr = 0x0;
if (btv->remote->rc5_gpio) {
u32 gpio;
- del_timer_sync(&btv->remote->timer_end);
+ del_timer_sync(&btv->remote->timer);
flush_scheduled_work();
gpio = bttv_gpio_read(&btv->c);
struct bttv_ir {
struct rc_dev *dev;
+ struct timer_list timer;
char name[32];
char phys[32];
int start; // What should RC5_START() be
int addr; // What RC5_ADDR() should be.
int rc5_remote_gap;
- struct timer_list timer;
/* RC5 gpio */
u32 rc5_gpio;
- struct timer_list timer_end; /* timer_end for code completion */
u32 last_bit; /* last raw bit seen */
u32 code; /* raw code under construction */
struct timeval base_time; /* time of last seen code */