struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge);
struct cdns_dsi *dsi = input_to_dsi(input);
u32 val;
+ int ret;
dsi->link_initialized = false;
val = readl(dsi->regs + MCTL_MAIN_DATA_CTL);
sys_mipi_dsi_set_ppi_txbyte_hs(0, dsi);
phy_power_off(dsi->dphy);
phy_exit(dsi->dphy);
+
+ ret = cdns_dsi_resets_assert(dsi, dsi->base.dev);
+ if (ret < 0)
+ dev_err(dsi->base.dev, "failed to assert reset\n");
+ cdns_dsi_clock_disable(dsi);
}
#if 0
int nlanes;
int vrefresh;
u32 div;
+ int ret;
+
+ ret = cdns_dsi_clock_enable(dsi, dsi->base.dev);
+ if (ret) {
+ dev_err(dsi->base.dev, "failed to enable clock\n");
+ return;
+ }
+ ret = cdns_dsi_resets_deassert(dsi, dsi->base.dev);
+ if (ret < 0) {
+ dev_err(dsi->base.dev, "failed to deassert reset\n");
+ return;
+ }
if (WARN_ON(pm_runtime_get_sync(dsi->base.dev) < 0))
return;
vs_crtc_state->bpp = cal_pixel_bits(vs_crtc_state->output_fmt);
- vs_crtc->funcs->enable(vs_crtc->dev, crtc);
-
- drm_crtc_vblank_on(crtc);
+ if (vs_crtc_state->encoder_type != DRM_MODE_ENCODER_DSI){
+ vs_crtc->funcs->enable(vs_crtc->dev, crtc);
+ drm_crtc_vblank_on(crtc);
+ }
}
static void vs_crtc_atomic_disable(struct drm_crtc *crtc,
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
crtc);
//struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,crtc);
+
struct vs_crtc *vs_crtc = to_vs_crtc(crtc);
struct device *dev = vs_crtc->dev;
struct drm_property_blob *blob = crtc->state->gamma_lut;
struct drm_color_lut *lut;
+ struct vs_crtc_state *vs_crtc_state = to_vs_crtc_state(crtc->state);
+
+ if (vs_crtc_state->encoder_type == DRM_MODE_ENCODER_DSI){
+ vs_crtc->funcs->enable(vs_crtc->dev, crtc);
+ drm_crtc_vblank_on(crtc);
+ }
if (crtc_state->color_mgmt_changed) {
if ((blob) && (blob->length)) {