Fix bug detected by Michael snyder.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0730323..2f41707 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+start-sanitize-m32rx
+Tue Feb 24 18:03:25 1998  Nick Clifton  <nickc@cygnus.com>
+
+       * config/tc-m32r.c (first_writes_to_seconds_operands):
+       Reinitialise b_operands for each pass of the inner loop.
+end-sanitize-m32rx
 start-sanitize-sky
 Tue Feb 24 11:01:25 1998  Doug Evans  <devans@canuck.cygnus.com>
 

diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c
index c1fd99c..b47d9e4 100644 (file)
--- a/gas/config/tc-m32r.c
+++ b/gas/config/tc-m32r.c
@@ -410,13 +410,13 @@ first_writes_to_seconds_operands (a, b, check_outputs)
      const int   check_outputs;
 {
   const CGEN_OPERAND_INSTANCE * a_operands = CGEN_INSN_OPERANDS (a->insn);
-  const CGEN_OPERAND_INSTANCE * b_operands = CGEN_INSN_OPERANDS (b->insn);
+  const CGEN_OPERAND_INSTANCE * b_ops = CGEN_INSN_OPERANDS (b->insn);
   int                           a_index;
 
   /* If at least one of the instructions takes no operands, then there is
      nothing to check.  There really are instructions without operands,
      eg 'nop'.  */
-  if (a_operands == NULL || b_operands == NULL)
+  if (a_operands == NULL || b_ops == NULL)
     return 0;
       
   /* Scan the operand list of 'a' looking for an output operand.  */
@@ -427,6 +427,7 @@ first_writes_to_seconds_operands (a, b, check_outputs)
       if (CGEN_OPERAND_INSTANCE_TYPE (a_operands) == CGEN_OPERAND_INSTANCE_OUTPUT)
        {
          int b_index;
+         const CGEN_OPERAND_INSTANCE * b_operands = b_ops;
 
          /* Special Case:
             The Condition bit 'C' is a shadow of the CBR register (control