ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3
authorChanwoo Choi <cw00.choi@samsung.com>
Wed, 9 Aug 2017 06:53:39 +0000 (15:53 +0900)
committerChanwoo Choi <cw00.choi@samsung.com>
Wed, 13 Sep 2017 10:23:55 +0000 (19:23 +0900)
This patch adds the bus device tree nodes for INT (Internal) block
to enable the AMBA bus frequency scaling and add the NoC (Network on Chip)
Probe Device Tree node to measure the bandwidth for AMBA AXI bus.

The WCORE bus bus is parent device in INT block using VDD_INT.

Change-Id: Iddfe7f4970beca1abea9fd6d01b951021b45ba0c
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi

index 47257a7465faf070d307716caf8c3d6db54e78b6..04b44e9c3034c63d7ef37cc839fb724445c89c10 100644 (file)
        };
 };
 
+&bus_wcore {
+       devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
+                       <&nocp_mem1_0>, <&nocp_mem1_1>;
+       vdd-supply = <&buck3_reg>;
+       exynos,saturation-ratio = <100>;
+       status = "okay";
+};
+
+&bus_noc {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_fsys_apb {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_fsys {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_fsys2 {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_mfc {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_gen {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_peri {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_g2d {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_g2d_acp {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_jpeg {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_jpeg_apb {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_disp1_fimd {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_disp1 {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_gscl_scaler {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&bus_mscl {
+       devfreq = <&bus_wcore>;
+       status = "okay";
+};
+
+&nocp_mem0_0 {
+       status = "okay";
+};
+
+&nocp_mem0_1 {
+       status = "okay";
+};
+
+&nocp_mem1_0 {
+       status = "okay";
+};
+
+&nocp_mem1_1 {
+       status = "okay";
+};
+
 &hsi2c_5 {
        status = "okay";
        max98090: max98090@10 {