[AArch64][gas] Add support for Neoverse N1
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Fri, 22 Feb 2019 09:56:50 +0000 (09:56 +0000)
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>
Fri, 22 Feb 2019 09:56:50 +0000 (09:56 +0000)
This adds support for the Neoverse N1 [1] CPU to gas.
This was previously enabled under the Ares codename, which remains as
a valid option for -mcpu for compatibility reasons.

make check-gas passes on aarch64-none-elf.

[1] https://community.arm.com/processors/b/blog/posts/arm-neoverse-n1-platform-accelerating-the-transformation-to-a-scalable-cloud-to-edge-infrastructure

2019-02-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

    * config/tc-aarch64.c (aarch64_cpus): Add neoverse-n1.
    * doc/c-aarch64.texi (-mcpu): Document neoverse-n1 value.

gas/ChangeLog
gas/config/tc-aarch64.c
gas/doc/c-aarch64.texi

index 2a4f194..d0cb785 100644 (file)
@@ -1,3 +1,8 @@
+2019-02-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/tc-aarch64.c (aarch64_cpus): Add neoverse-n1.
+       * doc/c-aarch64.texi (-mcpu): Document neoverse-n1 value.
+
 2019-02-19  Paul Hua  <paul.hua.gm@gmail.com>
 
        * NEWS: Mention -m[no-]fix-loongson3-llsc.
index 1acf6f6..ba8f161 100644 (file)
@@ -8746,6 +8746,11 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = {
                              AARCH64_FEATURE_CRC | AARCH64_FEATURE_CRYPTO
                              | AARCH64_FEATURE_RDMA),
    "Qualcomm Falkor"},
+  {"neoverse-n1", AARCH64_FEATURE (AARCH64_ARCH_V8_2,
+                                 AARCH64_FEATURE_RCPC | AARCH64_FEATURE_F16
+                                 | AARCH64_FEATURE_DOTPROD
+                                 | AARCH64_FEATURE_PROFILE),
+                                 "Neoverse N1"},
   {"qdf24xx", AARCH64_FEATURE (AARCH64_ARCH_V8,
                               AARCH64_FEATURE_CRC | AARCH64_FEATURE_CRYPTO
                               | AARCH64_FEATURE_RDMA),
index 7451f2f..a9cd7d0 100644 (file)
@@ -66,6 +66,7 @@ on the target processor.  The following processor names are recognized:
 @code{ares},
 @code{exynos-m1},
 @code{falkor},
+@code{neoverse-n1},
 @code{qdf24xx},
 @code{saphira},
 @code{thunderx},