[Hexagon] Packetize return value setup with the return instruction

Commit r279241 unintentionally reverted that ability.

llvm-svn: 279526

diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
index 4789284..fda30f0 100644 (file)
--- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -339,7 +339,8 @@ bool HexagonPacketizerList::isNewifiable(const MachineInstr &MI,
   if (NewRC == &Hexagon::PredRegsRegClass)
     if (HII->isV60VectorInstruction(MI) && MI.mayStore())
       return false;
-  return HII->isCondInst(MI) || HII->isJumpR(MI) || HII->mayBeNewStore(MI);
+  return HII->isCondInst(MI) || HII->isJumpR(MI) || MI.isReturn() ||
+         HII->mayBeNewStore(MI);
 }
 
 // Promote an instructiont to its .cur form.
@@ -805,7 +806,7 @@ bool HexagonPacketizerList::canPromoteToDotNew(const MachineInstr &MI,
 
   // predicate .new
   if (RC == &Hexagon::PredRegsRegClass)
-    if (HII->isCondInst(MI) || HII->isJumpR(MI))
+    if (HII->isCondInst(MI) || HII->isJumpR(MI) || MI.isReturn())
       return HII->predCanBeUsedAsDotNew(PI, DepReg);
 
   if (RC != &Hexagon::PredRegsRegClass && !HII->mayBeNewStore(MI))
@@ -1307,7 +1308,7 @@ bool HexagonPacketizerList::isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) {
       RC = HRI->getMinimalPhysRegClass(DepReg);
     }
 
-    if (I.isCall() || HII->isJumpR(I) || HII->isTailCall(I)) {
+    if (I.isCall() || HII->isJumpR(I) || I.isReturn() || HII->isTailCall(I)) {
       if (!isRegDependence(DepType))
         continue;
       if (!isCallDependent(I, DepType, SUJ->Succs[i].getReg()))

diff --git a/llvm/test/CodeGen/Hexagon/packetize-return-arg.ll b/llvm/test/CodeGen/Hexagon/packetize-return-arg.ll
new file mode 100644 (file)
index 0000000..b18fc23
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/packetize-return-arg.ll
@@ -0,0 +1,37 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+; Check that "r0 = rN" is packetized together with dealloc_return.
+; CHECK: r0 = r
+; CHECK-NOT: {
+; CHECK: dealloc_return
+
+target triple = "hexagon-unknown--elf"
+
+; Function Attrs: nounwind
+define i8* @fred(i8* %user_context, i32 %x) #0 {
+entry:
+  %and14 = add i32 %x, 255
+  %add1 = and i32 %and14, -128
+  %call = tail call i8* @malloc(i32 %add1) #1
+  %cmp = icmp eq i8* %call, null
+  br i1 %cmp, label %cleanup, label %if.end
+
+if.end:                                           ; preds = %entry
+  %0 = ptrtoint i8* %call to i32
+  %sub4 = add i32 %0, 131
+  %and5 = and i32 %sub4, -128
+  %1 = inttoptr i32 %and5 to i8*
+  %2 = inttoptr i32 %and5 to i8**
+  %arrayidx = getelementptr inbounds i8*, i8** %2, i32 -1
+  store i8* %call, i8** %arrayidx, align 4
+  br label %cleanup
+
+cleanup:                                          ; preds = %if.end, %entry
+  %retval.0 = phi i8* [ %1, %if.end ], [ null, %entry ]
+  ret i8* %retval.0
+}
+
+; Function Attrs: nounwind
+declare noalias i8* @malloc(i32) local_unnamed_addr #1
+
+attributes #0 = { nounwind }
+attributes #1 = { nobuiltin nounwind }