ARM: IXP: Remove actux3 board
authorMarek Vasut <marex@denx.de>
Mon, 27 Jan 2014 23:08:10 +0000 (00:08 +0100)
committerMarek Vasut <marex@denx.de>
Thu, 6 Feb 2014 01:51:51 +0000 (02:51 +0100)
The board is unmaintained, just like the rest of the IXP.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
board/actux3/Makefile [deleted file]
board/actux3/actux3.c [deleted file]
board/actux3/actux3_hw.h [deleted file]
board/actux3/u-boot.lds [deleted file]
boards.cfg
doc/README.scrapyard
include/configs/actux3.h [deleted file]

diff --git a/board/actux3/Makefile b/board/actux3/Makefile
deleted file mode 100644 (file)
index f628f26..0000000
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:     GPL-2.0+
-#
-
-obj-y  := actux3.o
diff --git a/board/actux3/actux3.c b/board/actux3/actux3.c
deleted file mode 100644 (file)
index 09c803c..0000000
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/arch/ixp425.h>
-#include <asm/io.h>
-#include <miiphy.h>
-#include "actux3_hw.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
-       /* CS1: IPAC-X */
-       writel(0x94d10013, IXP425_EXP_CS1);
-       /* CS5: Debug port */
-       writel(0x9d520003, IXP425_EXP_CS5);
-       /* CS6: Release/Option register */
-       writel(0x81860001, IXP425_EXP_CS6);
-       /* CS7: LEDs */
-       writel(0x80900003, IXP425_EXP_CS7);
-
-       return 0;
-}
-
-int board_init(void)
-{
-       /* adress of boot parameters */
-       gd->bd->bi_boot_params = 0x00000100;
-
-       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
-       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_ETHRST);
-       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DSR);
-       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DCD);
-       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED5_GN);
-       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED6_RT);
-       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED6_GN);
-
-       GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
-       GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_ETHRST);
-
-       GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DSR);
-       GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DCD);
-
-       GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED5_GN);
-       GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED6_RT);
-       GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED6_GN);
-
-       /*
-        * Setup GPIO's for Interrupt inputs
-        */
-       GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DBGINT);
-       GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_ETHINT);
-
-       /*
-        * Setup GPIO's for 33MHz clock output
-        */
-       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
-       GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
-       writel(0x011001FF, IXP425_GPIO_GPCLKR);
-
-       /* we need a minimum PCI reset pulse width after enabling the clock */
-       udelay(533);
-       GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
-       GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_ETHRST);
-
-       ACTUX3_LED1_RT(1);
-       ACTUX3_LED1_GN(0);
-       ACTUX3_LED2_RT(0);
-       ACTUX3_LED2_GN(0);
-       ACTUX3_LED3_RT(0);
-       ACTUX3_LED3_GN(0);
-       ACTUX3_LED4_GN(0);
-       ACTUX3_LED5_RT(0);
-
-       return 0;
-}
-
-/*
- * Check Board Identity
- */
-int checkboard(void)
-{
-       char buf[64];
-       int i = getenv_f("serial#", buf, sizeof(buf));
-
-       puts("Board: AcTux-3 rev.");
-       putc(ACTUX3_BOARDREL + 'A' - 1);
-
-       if (i > 0) {
-               puts (", serial# ");
-               puts (buf);
-       }
-       putc('\n');
-
-       return 0;
-}
-
-/*************************************************************************
- * get_board_rev() - setup to pass kernel board revision information
- * 0 = reserved
- * 1 = Rev. A
- * 2 = Rev. B
- *************************************************************************/
-u32 get_board_rev(void)
-{
-       return ACTUX3_BOARDREL;
-}
-
-int dram_init(void)
-{
-       gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
-       return 0;
-}
-
-void reset_phy(void)
-{
-       int i;
-
-       /* initialize the PHY */
-       miiphy_reset("NPE0", CONFIG_PHY_ADDR);
-
-       /* all LED outputs = Link/Act */
-       miiphy_write("NPE0", CONFIG_PHY_ADDR, 0x16, 0x0AAA);
-
-       /*
-        * The Marvell 88E6060 switch comes up with all ports disabled.
-        * set all ethernet switch ports to forwarding state
-       */
-       for (i = 1; i <= 5; i++)
-               miiphy_write("NPE0", CONFIG_PHY_ADDR + 8 + i, 0x04, 0x03);
-
-}
diff --git a/board/actux3/actux3_hw.h b/board/actux3/actux3_hw.h
deleted file mode 100644 (file)
index f8acb4d..0000000
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * hardware register definitions for the AcTux-3 board.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#ifndef _ACTUX3_HW_H
-#define _ACTUX3_HW_H
-
-/* 0 = LED off,1 = ON */
-#define ACTUX3_LED1_RT(a)      writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 0)
-#define ACTUX3_LED1_GN(a)      writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 1)
-#define ACTUX3_LED2_RT(a)      writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 2)
-#define ACTUX3_LED2_GN(a)      writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 3)
-#define ACTUX3_LED3_RT(a)      writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 4)
-#define ACTUX3_LED3_GN(a)      writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 5)
-#define ACTUX3_LED4_GN(a)      writeb((a)^1, IXP425_EXP_BUS_CS7_BASE_PHYS + 6)
-#define ACTUX3_LED5_RT(a)      writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 7)
-
-#define ACTUX3_DBG_PORT                IXP425_EXP_BUS_CS5_BASE_PHYS
-#define ACTUX3_BOARDREL                (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F)
-#define ACTUX3_OPTION          (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0xF0)
-
-/* GPIO settings */
-#define CONFIG_SYS_GPIO_DBGINT                 0
-#define CONFIG_SYS_GPIO_ETHINT                 1
-#define CONFIG_SYS_GPIO_ETHRST                 2       /* Out */
-#define CONFIG_SYS_GPIO_LED5_GN                3       /* Out */
-#define CONFIG_SYS_GPIO_LED6_RT                4       /* Out */
-#define CONFIG_SYS_GPIO_LED6_GN                5       /* Out */
-#define CONFIG_SYS_GPIO_DSR                    6       /* Out */
-#define CONFIG_SYS_GPIO_DCD                    7       /* Out */
-#define CONFIG_SYS_GPIO_DBGJUMPER              9
-#define CONFIG_SYS_GPIO_BUTTON1                10
-#define CONFIG_SYS_GPIO_DBGSENSE               11
-#define CONFIG_SYS_GPIO_DTR                    12
-#define CONFIG_SYS_GPIO_IORST                  13      /* Out */
-#define CONFIG_SYS_GPIO_PCI_CLK                14      /* Out */
-#define CONFIG_SYS_GPIO_EXTBUS_CLK             15      /* Out */
-
-#endif
diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds
deleted file mode 100644 (file)
index 2de3ca6..0000000
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
-OUTPUT_ARCH (arm)
-ENTRY (_start)
-SECTIONS
-{
-       . = 0x00000000;
-
-       . = ALIGN (4);
-       .text : {
-               *(.__image_copy_start)
-               arch/arm/cpu/ixp/start.o(.text*)
-               net/built-in.o(.text*)
-               board/actux3/built-in.o(.text*)
-               arch/arm/cpu/ixp/built-in.o(.text*)
-               drivers/input/built-in.o(.text*)
-
-               . = env_offset;
-               common/env_embedded.o(.ppcenv)
-               *(.text*)
-       }
-
-       . = ALIGN(4);
-       .rodata : {
-               *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-       }
-       . = ALIGN(4);
-       .data : {
-               *(.data*)
-       }
-       . = ALIGN(4);
-       .got : {
-               *(.got)
-       }
-       . =.;
-
-       . = ALIGN(4);
-       .u_boot_list : {
-               KEEP(*(SORT(.u_boot_list*)));
-       }
-
-       . = ALIGN (4);
-
-       .image_copy_end :
-       {
-               *(.__image_copy_end)
-       }
-
-       .rel_dyn_start :
-       {
-               *(.__rel_dyn_start)
-       }
-
-       .rel.dyn : {
-               *(.rel*)
-       }
-
-       .rel_dyn_end :
-       {
-               *(.__rel_dyn_end)
-       }
-
-       _end = .;
-
-/*
- * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
- * __bss_base and __bss_limit are for linker only (overlay ordering)
- */
-
-       .bss_start __rel_dyn_start (OVERLAY) : {
-               KEEP(*(.__bss_start));
-               __bss_base = .;
-       }
-
-       .bss __bss_base (OVERLAY) : {
-               *(.bss*)
-                . = ALIGN(4);
-               __bss_limit = .;
-       }
-       .bss_end __bss_limit (OVERLAY) : {
-               KEEP(*(.__bss_end));
-       }
-
-       .dynsym _end : { *(.dynsym) }
-       .dynbss : { *(.dynbss) }
-       .dynstr : { *(.dynstr*) }
-       .dynamic : { *(.dynamic*) }
-       .hash : { *(.hash*) }
-       .plt : { *(.plt*) }
-       .interp : { *(.interp*) }
-       .gnu : { *(.gnu*) }
-       .ARM.exidx : { *(.ARM.exidx*) }
-}
index d3ebb4f..ab94887 100644 (file)
@@ -377,7 +377,6 @@ Active  arm         armv7:arm720t  tegra20     toradex         colibri_t20_iris
 Active  arm         armv7:arm720t  tegra30     avionic-design  tec-ng              tec-ng                               -                                                                                                                                 Alban Bedel <alban.bedel@avionic-design.de>
 Active  arm         armv7:arm720t  tegra30     nvidia          beaver              beaver                               -                                                                                                                                 Tom Warren <twarren@nvidia.com>:Stephen Warren <swarren@nvidia.com>
 Active  arm         armv7:arm720t  tegra30     nvidia          cardhu              cardhu                               -                                                                                                                                 Tom Warren <twarren@nvidia.com>
-Active  arm         ixp            -           -               -                   actux3                               -                                                                                                                                 Michael Schwingen <michael@schwingen.org>
 Active  arm         ixp            -           -               -                   actux4                               -                                                                                                                                 Michael Schwingen <michael@schwingen.org>
 Active  arm         ixp            -           -               -                   dvlhost                              -                                                                                                                                 Michael Schwingen <michael@schwingen.org>
 Active  arm         pxa            -           -               -                   balloon3                             -                                                                                                                                 Marek Vasut <marek.vasut@gmail.com>
index 0ac90a9..2e64278 100644 (file)
@@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+actux3           arm         ixp            -           2014-01-28  Michael Schwingen <michael@schwingen.org>
 actux2           arm         ixp            -           2014-01-28  Michael Schwingen <michael@schwingen.org>
 actux1           arm         ixp            -           2014-01-28  Michael Schwingen <michael@schwingen.org>
 mx1ads           arm         arm920t        -           2014-01-13
diff --git a/include/configs/actux3.h b/include/configs/actux3.h
deleted file mode 100644 (file)
index 7639107..0000000
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * Configuration settings for the AcTux-3 board.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_IXP425                  1
-#define CONFIG_ACTUX3                  1
-
-#define        CONFIG_MACH_TYPE                1481
-
-#define CONFIG_DISPLAY_CPUINFO         1
-#define CONFIG_DISPLAY_BOARDINFO       1
-
-#define CONFIG_IXP_SERIAL
-#define CONFIG_SYS_IXP425_CONSOLE              IXP425_UART2
-#define CONFIG_BAUDRATE                        115200
-#define CONFIG_BOOTDELAY               3
-#define CONFIG_ZERO_BOOTDELAY_CHECK    /* check for keypress on bootdelay==0 */
-#define CONFIG_BOARD_EARLY_INIT_F      1
-#define CONFIG_SYS_LDSCRIPT    "board/actux3/u-boot.lds"
-
-/***************************************************************
- * U-boot generic defines start here.
- ***************************************************************/
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN                  (CONFIG_ENV_SIZE + 128*1024)
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Command line configuration. */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
-
-#define CONFIG_BOOTCOMMAND             "run boot_flash"
-/* enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG             1
-#define CONFIG_SETUP_MEMORY_TAGS       1
-#define CONFIG_INITRD_TAG              1
-#define CONFIG_REVISION_TAG            1
-
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_KGDB_BAUDRATE          230400
-#endif
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE                      256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE                      (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS                     16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE                    CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START               0x00400000
-#define CONFIG_SYS_MEMTEST_END                 0x00800000
-
-/* timer clock - 2* OSC_IN system clock */
-#define CONFIG_IXP425_TIMER_CLK                 66666666
-
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR                   0x00010000
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE              { 9600, 19200, 38400, 57600, \
-                                         115200, 230400 }
-#define CONFIG_SERIAL_RTS_ACTIVE       1
-
-/* Expansion bus settings */
-#define CONFIG_SYS_EXP_CS0                     0xbd113442
-
-/* SDRAM settings */
-#define CONFIG_NR_DRAM_BANKS           1
-#define PHYS_SDRAM_1                   0x00000000
-#define CONFIG_SYS_SDRAM_BASE                  0x00000000
-
-/* 16MB SDRAM */
-#define CONFIG_SYS_SDR_CONFIG                  0x3A
-#define PHYS_SDRAM_1_SIZE              0x01000000
-#define CONFIG_SYS_SDRAM_REFRESH_CNT           0x81a
-#define CONFIG_SYS_SDR_MODE_CONFIG             0x1
-#define CONFIG_SYS_DRAM_SIZE                   0x01000000
-
-/* FLASH organization */
-#define CONFIG_SYS_TEXT_BASE           0x50000000
-#define CONFIG_SYS_MAX_FLASH_BANKS             1
-/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_SECT              140
-#define PHYS_FLASH_1                   0x50000000
-#define CONFIG_SYS_FLASH_BANKS_LIST            { PHYS_FLASH_1 }
-
-#define CONFIG_SYS_FLASH_BASE                  PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_BASE                PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN                 (256 << 10)
-#define CONFIG_BOARD_SIZE_LIMIT                        262144
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* no byte writes on IXP4xx */
-#define CONFIG_SYS_FLASH_CFI_WIDTH             FLASH_CFI_16BIT
-
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-/* Ethernet */
-
-/* include IXP4xx NPE support */
-#define CONFIG_IXP4XX_NPE              1
-
-/* NPE0 PHY address */
-#define        CONFIG_PHY_ADDR                 0x10
-/* MII PHY management */
-#define CONFIG_MII                     1
-/* fixed-speed switch without standard PHY registers on MII */
-#define CONFIG_MII_NPE0_FIXEDLINK       1
-#define CONFIG_MII_NPE0_SPEED           100
-#define CONFIG_MII_NPE0_FULLDUPLEX      1
-
-/* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SYS_RX_ETH_BUFFER               16
-#define CONFIG_RESET_PHY_R             1
-/* ethernet switch connected to MII port */
-#define CONFIG_MII_ETHSWITCH           1
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#undef  CONFIG_CMD_NFS
-
-/* BOOTP options */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE              32
-
-/*
- * environment organization:
- * one flash sector, embedded in uboot area (bottom bootblock flash)
- */
-#define        CONFIG_ENV_IS_IN_FLASH          1
-#define CONFIG_ENV_SIZE                        0x2000
-#define CONFIG_ENV_ADDR                        (PHYS_FLASH_1 + 0x4000)
-#define CONFIG_SYS_USE_PPCENV                  1
-
-#define CONFIG_EXTRA_ENV_SETTINGS                                      \
-       "npe_ucode=50040000\0"                                          \
-       "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
-       "kerneladdr=50050000\0"                                         \
-       "kernelfile=actux3/uImage\0"                                    \
-       "rootfile=actux3/rootfs\0"                                      \
-       "rootaddr=50170000\0"                                           \
-       "loadaddr=10000\0"                                              \
-       "updateboot_ser=mw.b 10000 ff 40000;"                           \
-       " loady ${loadaddr};"                                           \
-       " run eraseboot writeboot\0"                                    \
-       "updateboot_net=mw.b 10000 ff 40000;"                           \
-       " tftp ${loadaddr} actux3/u-boot.bin;"                          \
-       " run eraseboot writeboot\0"                                    \
-       "eraseboot=protect off 50000000 50003fff;"                      \
-       " protect off 50006000 5003ffff;"                               \
-       " erase 50000000 50003fff;"                                     \
-       " erase 50006000 5003ffff\0"                                    \
-       "writeboot=cp.b 10000 50000000 4000;"                           \
-       " cp.b 16000 50006000 3a000\0"                                  \
-       "updateucode=loady;"                                            \
-       " era ${npe_ucode} +${filesize};"                               \
-       " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"                  \
-       "updateroot=tftp ${loadaddr} ${rootfile};"                      \
-       " era ${rootaddr} +${filesize};"                                \
-       " cp.b ${loadaddr} ${rootaddr} ${filesize}\0"                   \
-       "updatekern=tftp ${loadaddr} ${kernelfile};"                    \
-       " era ${kerneladdr} +${filesize};"                              \
-       " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"                 \
-       "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
-       " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
-       "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"   \
-       " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
-       "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
-       "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"       \
-       "boot_flash=run flashargs addtty addeth;"                       \
-       " bootm ${kerneladdr}\0"                                        \
-       "boot_net=run netargs addtty addeth;"                           \
-       " tftpboot ${loadaddr} ${kernelfile};"                          \
-       " bootm\0"
-
-/* additions for new relocation code, must be added to all boards */
-#define CONFIG_SYS_INIT_SP_ADDR                                                \
-       (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */