drm/amd/pm: drop unnecessary table existence and dpm enablement check
authorEvan Quan <evan.quan@amd.com>
Mon, 24 Aug 2020 07:21:30 +0000 (15:21 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 17 Sep 2020 21:47:33 +0000 (17:47 -0400)
Either this was already performed in parent API. Or the table is
confirmed to exist.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
drivers/gpu/drm/amd/pm/swsmu/smu_internal.h

index 29e041d..3aefc5f 100644 (file)
@@ -704,7 +704,6 @@ int smu_set_fan_speed_percent(struct smu_context *smu, uint32_t speed);
 int smu_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed);
 
 int smu_set_deep_sleep_dcefclk(struct smu_context *smu, int clk);
-int smu_set_active_display_count(struct smu_context *smu, uint32_t count);
 
 int smu_get_clock_by_type(struct smu_context *smu,
                          enum amd_pp_clock_type type,
index b98deca..ac94aa7 100644 (file)
@@ -580,9 +580,6 @@ static int smu_fini_fb_allocations(struct smu_context *smu)
        struct smu_table *tables = smu_table->tables;
        struct smu_table *driver_table = &(smu_table->driver_table);
 
-       if (!tables)
-               return 0;
-
        if (tables[SMU_TABLE_PMSTATUSLOG].mc_address)
                amdgpu_bo_free_kernel(&tables[SMU_TABLE_PMSTATUSLOG].bo,
                                      &tables[SMU_TABLE_PMSTATUSLOG].mc_address,
@@ -2316,19 +2313,6 @@ int smu_set_deep_sleep_dcefclk(struct smu_context *smu, int clk)
        return ret;
 }
 
-int smu_set_active_display_count(struct smu_context *smu, uint32_t count)
-{
-       int ret = 0;
-
-       if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
-               return -EOPNOTSUPP;
-
-       if (smu->ppt_funcs->set_active_display_count)
-               ret = smu->ppt_funcs->set_active_display_count(smu, count);
-
-       return ret;
-}
-
 int smu_get_clock_by_type(struct smu_context *smu,
                          enum amd_pp_clock_type type,
                          struct amd_pp_clocks *clocks)
index 4aa257c..a8f2ea1 100644 (file)
@@ -453,9 +453,6 @@ int smu_v11_0_init_power(struct smu_context *smu)
 {
        struct smu_power_context *smu_power = &smu->smu_power;
 
-       if (smu_power->power_context || smu_power->power_context_size != 0)
-               return -EINVAL;
-
        smu_power->power_context = kzalloc(sizeof(struct smu_11_0_dpm_context),
                                           GFP_KERNEL);
        if (!smu_power->power_context)
@@ -469,9 +466,6 @@ int smu_v11_0_fini_power(struct smu_context *smu)
 {
        struct smu_power_context *smu_power = &smu->smu_power;
 
-       if (!smu_power->power_context || smu_power->power_context_size == 0)
-               return -EINVAL;
-
        kfree(smu_power->power_context);
        smu_power->power_context = NULL;
        smu_power->power_context_size = 0;
@@ -700,18 +694,16 @@ int smu_v11_0_set_tool_table_location(struct smu_context *smu)
 
 int smu_v11_0_init_display_count(struct smu_context *smu, uint32_t count)
 {
-       int ret = 0;
        struct amdgpu_device *adev = smu->adev;
 
        /* Navy_Flounder do not support to change display num currently */
        if (adev->asic_type == CHIP_NAVY_FLOUNDER)
                return 0;
 
-       if (!smu->pm_enabled)
-               return ret;
-
-       ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays, count, NULL);
-       return ret;
+       return smu_cmn_send_smc_msg_with_param(smu,
+                                              SMU_MSG_NumOfDisplays,
+                                              count,
+                                              NULL);
 }
 
 
@@ -773,9 +765,6 @@ int smu_v11_0_notify_display_change(struct smu_context *smu)
 {
        int ret = 0;
 
-       if (!smu->pm_enabled)
-               return ret;
-
        if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) &&
            smu->adev->gmc.vram_type == AMDGPU_VRAM_TYPE_HBM)
                ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetUclkFastSwitch, 1, NULL);
index 521b805..c5adbe4 100644 (file)
@@ -42,6 +42,7 @@
 #define smu_check_fw_version(smu)                                      smu_ppt_funcs(check_fw_version, 0, smu)
 #define smu_write_pptable(smu)                                         smu_ppt_funcs(write_pptable, 0, smu)
 #define smu_set_min_dcef_deep_sleep(smu, clk)                          smu_ppt_funcs(set_min_dcef_deep_sleep, 0, smu, clk)
+#define smu_set_active_display_count(smu, count)                       smu_ppt_funcs(set_active_display_count, 0, smu, count)
 #define smu_set_driver_table_location(smu)                             smu_ppt_funcs(set_driver_table_location, 0, smu)
 #define smu_set_tool_table_location(smu)                               smu_ppt_funcs(set_tool_table_location, 0, smu)
 #define smu_notify_memory_pool_location(smu)                           smu_ppt_funcs(notify_memory_pool_location, 0, smu)