Convert CONFIG_SYS_CACHE_STASHING to Kconfig
authorTom Rini <trini@konsulko.com>
Mon, 27 Jun 2022 17:35:46 +0000 (13:35 -0400)
committerTom Rini <trini@konsulko.com>
Fri, 8 Jul 2022 21:57:33 +0000 (17:57 -0400)
This converts the following to Kconfig:
   CONFIG_SYS_CACHE_STASHING

Signed-off-by: Tom Rini <trini@konsulko.com>
50 files changed:
arch/powerpc/cpu/mpc85xx/Kconfig
configs/P2041RDB_NAND_defconfig
configs/P2041RDB_SDCARD_defconfig
configs/P2041RDB_SPIFLASH_defconfig
configs/P2041RDB_defconfig
configs/P3041DS_NAND_defconfig
configs/P3041DS_SDCARD_defconfig
configs/P3041DS_SPIFLASH_defconfig
configs/P3041DS_defconfig
configs/P4080DS_SDCARD_defconfig
configs/P4080DS_SPIFLASH_defconfig
configs/P4080DS_defconfig
configs/P5040DS_NAND_defconfig
configs/P5040DS_SDCARD_defconfig
configs/P5040DS_SPIFLASH_defconfig
configs/P5040DS_defconfig
configs/T1024RDB_NAND_defconfig
configs/T1024RDB_SDCARD_defconfig
configs/T1024RDB_SPIFLASH_defconfig
configs/T1024RDB_defconfig
configs/T1042D4RDB_NAND_defconfig
configs/T1042D4RDB_SDCARD_defconfig
configs/T1042D4RDB_SPIFLASH_defconfig
configs/T1042D4RDB_defconfig
configs/T2080QDS_NAND_defconfig
configs/T2080QDS_SDCARD_defconfig
configs/T2080QDS_SECURE_BOOT_defconfig
configs/T2080QDS_SPIFLASH_defconfig
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
configs/T2080QDS_defconfig
configs/T2080RDB_NAND_defconfig
configs/T2080RDB_SDCARD_defconfig
configs/T2080RDB_SPIFLASH_defconfig
configs/T2080RDB_defconfig
configs/T2080RDB_revD_NAND_defconfig
configs/T2080RDB_revD_SDCARD_defconfig
configs/T2080RDB_revD_SPIFLASH_defconfig
configs/T2080RDB_revD_defconfig
configs/T4240RDB_SDCARD_defconfig
configs/T4240RDB_defconfig
configs/kmcent2_defconfig
include/configs/P2041RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/corenet_ds.h
include/configs/kmcent2.h
scripts/config_whitelist.txt

index 915e28e..b6881bf 100644 (file)
@@ -1230,6 +1230,9 @@ config SYS_CPC_REINIT_F
 config SYS_FSL_CPC
        bool "Corenet Platform Cache support"
 
+config SYS_CACHE_STASHING
+       bool "Enable cache stashing"
+
 config SYS_MPC85XX_NO_RESETVEC
        bool "Discard resetvec section and move bootpg section up"
        depends on MPC85xx
index 4c453a7..30bf78b 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index b5f920b..d5ad609 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index ecf63e5..97b01b4 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index e609dfc..c1eb080 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 59fdc33..1df522a 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 17aa980..2380cfc 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 2be600a..8a2464d 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index f227195..0abf6e1 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 2aba222..66769e0 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 9bfb0a8..8b5b814 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 1d5f00d..a0b12d0 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 741adc5..f48b0f9 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index c10c948..bf72874 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 111ca1d..c3a5f63 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index fd94afa..9dac9e9 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index d44f062..de2b09c 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
index fdff32c..3a3cff8 100644 (file)
@@ -16,6 +16,7 @@ CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index fdfbdd2..9499f58 100644 (file)
@@ -18,6 +18,7 @@ CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index 9f1599f..da28ef1 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index aca69b3..e51e363 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
index fcf530d..e86f0fa 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index 3e0239e..c8d8857 100644 (file)
@@ -17,6 +17,7 @@ CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index 3063157..1f3d6f6 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index 0a83ed1..f947561 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
index 2f12b4e..d83d365 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index 2fc4e16..a18ea56 100644 (file)
@@ -8,6 +8,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_NXP_ESBC=y
 CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000
 CONFIG_PCIE1=y
index 7adf3af..160e697 100644 (file)
@@ -17,6 +17,7 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index 2228c64..16563ea 100644 (file)
@@ -9,6 +9,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SRIO_PCIE_BOOT_SLAVE=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index fbfbab8..e7775da 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index b84d653..472e577 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
index 21f76bd..6882baf 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index bcc60b7..5b1824d 100644 (file)
@@ -17,6 +17,7 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index 8df5b3d..6c6835e 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index a8e020a..a34c7ca 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
index 3baf69a..0f503a8 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
 CONFIG_PCIE1=y
index 9d8feac..d5845fe 100644 (file)
@@ -17,6 +17,7 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
 CONFIG_PCIE1=y
index e4eaa75..e599c4e 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_T2080RDB_REV_D=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index a2062b4..bd467ac 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_TARGET_T4240RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
index c321647..5b7849e 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y
index ee900f5..a0c9244 100644 (file)
@@ -13,6 +13,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
 CONFIG_SYS_FSL_CPC=y
+CONFIG_SYS_CACHE_STASHING=y
 # CONFIG_DEEP_SLEEP is not set
 CONFIG_PCIE1=y
 CONFIG_KM_DEF_NETDEV="eth2"
index 64f4c24..2d55283 100644 (file)
@@ -45,7 +45,6 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_SYS_CACHE_STASHING
 #define CONFIG_SYS_INIT_L2CSR0         L2CSR0_L2E
 
 #define CONFIG_POST CONFIG_SYS_POST_MEMORY     /* test POST memory test */
index 3df6ec6..c90ffe0 100644 (file)
@@ -95,7 +95,6 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_SYS_CACHE_STASHING
 #define CONFIG_SYS_INIT_L2CSR0         L2CSR0_L2E
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
index 8503fd1..56486cf 100644 (file)
@@ -63,7 +63,6 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_SYS_CACHE_STASHING
 #define CONFIG_SYS_INIT_L2CSR0         L2CSR0_L2E
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
index e981f62..710254a 100644 (file)
@@ -68,7 +68,6 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_SYS_CACHE_STASHING
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
index 48cdc75..8ade2e3 100644 (file)
@@ -63,7 +63,6 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_SYS_CACHE_STASHING
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
index c31b0b6..653483c 100644 (file)
@@ -44,7 +44,6 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_SYS_CACHE_STASHING
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
index f20f4e3..4eeca47 100644 (file)
@@ -38,7 +38,6 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_SYS_CACHE_STASHING
 #define CONFIG_SYS_INIT_L2CSR0         L2CSR0_L2E
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
index 3f22ddc..b389229 100644 (file)
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_SYS_CACHE_STASHING
 #define CONFIG_SYS_INIT_L2CSR0         L2CSR0_L2E
 
 /* POST memory regions test */
index 0a2b817..000ec09 100644 (file)
@@ -495,7 +495,6 @@ CONFIG_SYS_CACHE_ACR1
 CONFIG_SYS_CACHE_ACR2
 CONFIG_SYS_CACHE_DCACR
 CONFIG_SYS_CACHE_ICACR
-CONFIG_SYS_CACHE_STASHING
 CONFIG_SYS_CCSRBAR
 CONFIG_SYS_CCSRBAR_PHYS
 CONFIG_SYS_CCSRBAR_PHYS_HIGH