freedreno/ir3: drop unused instr category arg

No longer used, so drop the extra arg to ir3_instr_create()

Signed-off-by: Rob Clark <robclark@freedesktop.org>

diff --git a/src/gallium/drivers/freedreno/ir3/ir3.c b/src/gallium/drivers/freedreno/ir3/ir3.c
index 2e7f200..3de8fdc 100644 (file)
--- a/src/gallium/drivers/freedreno/ir3/ir3.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3.c
@@ -683,23 +683,21 @@ static struct ir3_instruction *instr_create(struct ir3_block *block, int nreg)
 }
 
 struct ir3_instruction * ir3_instr_create2(struct ir3_block *block,
-               int category, opc_t opc, int nreg)
+               opc_t opc, int nreg)
 {
        struct ir3_instruction *instr = instr_create(block, nreg);
        instr->block = block;
-       debug_assert(opc_cat(opc) == category);
        instr->opc = opc;
        insert_instr(block, instr);
        return instr;
 }
 
-struct ir3_instruction * ir3_instr_create(struct ir3_block *block,
-               int category, opc_t opc)
+struct ir3_instruction * ir3_instr_create(struct ir3_block *block, opc_t opc)
 {
        /* NOTE: we could be slightly more clever, at least for non-meta,
         * and choose # of regs based on category.
         */
-       return ir3_instr_create2(block, category, opc, 4);
+       return ir3_instr_create2(block, opc, 4);
 }
 
 struct ir3_instruction * ir3_instr_clone(struct ir3_instruction *instr)

diff --git a/src/gallium/drivers/freedreno/ir3/ir3.h b/src/gallium/drivers/freedreno/ir3/ir3.h
index 1391cbd..f268c2b 100644 (file)
--- a/src/gallium/drivers/freedreno/ir3/ir3.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3.h
@@ -443,10 +443,9 @@ void * ir3_alloc(struct ir3 *shader, int sz);
 
 struct ir3_block * ir3_block_create(struct ir3 *shader);
 
-struct ir3_instruction * ir3_instr_create(struct ir3_block *block,
-               int category, opc_t opc);
+struct ir3_instruction * ir3_instr_create(struct ir3_block *block, opc_t opc);
 struct ir3_instruction * ir3_instr_create2(struct ir3_block *block,
-               int category, opc_t opc, int nreg);
+               opc_t opc, int nreg);
 struct ir3_instruction * ir3_instr_clone(struct ir3_instruction *instr);
 const char *ir3_instr_name(struct ir3_instruction *instr);
 
@@ -900,8 +899,7 @@ void ir3_legalize(struct ir3 *ir, bool *has_samp, int *max_bary);
 static inline struct ir3_instruction *
 ir3_MOV(struct ir3_block *block, struct ir3_instruction *src, type_t type)
 {
-       struct ir3_instruction *instr =
-               ir3_instr_create(block, 1, OPC_MOV);
+       struct ir3_instruction *instr = ir3_instr_create(block, OPC_MOV);
        ir3_reg_create(instr, 0, 0);   /* dst */
        if (src->regs[0]->flags & IR3_REG_ARRAY) {
                struct ir3_register *src_reg =
@@ -921,8 +919,7 @@ static inline struct ir3_instruction *
 ir3_COV(struct ir3_block *block, struct ir3_instruction *src,
                type_t src_type, type_t dst_type)
 {
-       struct ir3_instruction *instr =
-               ir3_instr_create(block, 1, OPC_MOV);
+       struct ir3_instruction *instr = ir3_instr_create(block, OPC_MOV);
        ir3_reg_create(instr, 0, 0);   /* dst */
        ir3_reg_create(instr, 0, IR3_REG_SSA)->instr = src;
        instr->cat1.src_type = src_type;
@@ -934,45 +931,45 @@ ir3_COV(struct ir3_block *block, struct ir3_instruction *src,
 static inline struct ir3_instruction *
 ir3_NOP(struct ir3_block *block)
 {
-       return ir3_instr_create(block, 0, OPC_NOP);
+       return ir3_instr_create(block, OPC_NOP);
 }
 
-#define INSTR0(CAT, name)                                                \
+#define INSTR0(name)                                                     \
 static inline struct ir3_instruction *                                   \
 ir3_##name(struct ir3_block *block)                                      \
 {                                                                        \
        struct ir3_instruction *instr =                                      \
-               ir3_instr_create(block, CAT, OPC_##name);                        \
+               ir3_instr_create(block, OPC_##name);                             \
        return instr;                                                        \
 }
 
-#define INSTR1(CAT, name)                                                \
+#define INSTR1(name)                                                     \
 static inline struct ir3_instruction *                                   \
 ir3_##name(struct ir3_block *block,                                      \
                struct ir3_instruction *a, unsigned aflags)                      \
 {                                                                        \
        struct ir3_instruction *instr =                                      \
-               ir3_instr_create(block, CAT, OPC_##name);                        \
+               ir3_instr_create(block, OPC_##name);                             \
        ir3_reg_create(instr, 0, 0);   /* dst */                             \
        ir3_reg_create(instr, 0, IR3_REG_SSA | aflags)->instr = a;           \
        return instr;                                                        \
 }
 
-#define INSTR2(CAT, name)                                                \
+#define INSTR2(name)                                                     \
 static inline struct ir3_instruction *                                   \
 ir3_##name(struct ir3_block *block,                                      \
                struct ir3_instruction *a, unsigned aflags,                      \
                struct ir3_instruction *b, unsigned bflags)                      \
 {                                                                        \
        struct ir3_instruction *instr =                                      \
-               ir3_instr_create(block, CAT, OPC_##name);                        \
+               ir3_instr_create(block, OPC_##name);                             \
        ir3_reg_create(instr, 0, 0);   /* dst */                             \
        ir3_reg_create(instr, 0, IR3_REG_SSA | aflags)->instr = a;           \
        ir3_reg_create(instr, 0, IR3_REG_SSA | bflags)->instr = b;           \
        return instr;                                                        \
 }
 
-#define INSTR3(CAT, name)                                                \
+#define INSTR3(name)                                                     \
 static inline struct ir3_instruction *                                   \
 ir3_##name(struct ir3_block *block,                                      \
                struct ir3_instruction *a, unsigned aflags,                      \
@@ -980,7 +977,7 @@ ir3_##name(struct ir3_block *block,                                      \
                struct ir3_instruction *c, unsigned cflags)                      \
 {                                                                        \
        struct ir3_instruction *instr =                                      \
-               ir3_instr_create(block, CAT, OPC_##name);                        \
+               ir3_instr_create(block, OPC_##name);                             \
        ir3_reg_create(instr, 0, 0);   /* dst */                             \
        ir3_reg_create(instr, 0, IR3_REG_SSA | aflags)->instr = a;           \
        ir3_reg_create(instr, 0, IR3_REG_SSA | bflags)->instr = b;           \
@@ -989,89 +986,89 @@ ir3_##name(struct ir3_block *block,                                      \
 }
 
 /* cat0 instructions: */
-INSTR0(0, BR);
-INSTR0(0, JUMP);
-INSTR1(0, KILL);
-INSTR0(0, END);
+INSTR0(BR);
+INSTR0(JUMP);
+INSTR1(KILL);
+INSTR0(END);
 
 /* cat2 instructions, most 2 src but some 1 src: */
-INSTR2(2, ADD_F)
-INSTR2(2, MIN_F)
-INSTR2(2, MAX_F)
-INSTR2(2, MUL_F)
-INSTR1(2, SIGN_F)
-INSTR2(2, CMPS_F)
-INSTR1(2, ABSNEG_F)
-INSTR2(2, CMPV_F)
-INSTR1(2, FLOOR_F)
-INSTR1(2, CEIL_F)
-INSTR1(2, RNDNE_F)
-INSTR1(2, RNDAZ_F)
-INSTR1(2, TRUNC_F)
-INSTR2(2, ADD_U)
-INSTR2(2, ADD_S)
-INSTR2(2, SUB_U)
-INSTR2(2, SUB_S)
-INSTR2(2, CMPS_U)
-INSTR2(2, CMPS_S)
-INSTR2(2, MIN_U)
-INSTR2(2, MIN_S)
-INSTR2(2, MAX_U)
-INSTR2(2, MAX_S)
-INSTR1(2, ABSNEG_S)
-INSTR2(2, AND_B)
-INSTR2(2, OR_B)
-INSTR1(2, NOT_B)
-INSTR2(2, XOR_B)
-INSTR2(2, CMPV_U)
-INSTR2(2, CMPV_S)
-INSTR2(2, MUL_U)
-INSTR2(2, MUL_S)
-INSTR2(2, MULL_U)
-INSTR1(2, BFREV_B)
-INSTR1(2, CLZ_S)
-INSTR1(2, CLZ_B)
-INSTR2(2, SHL_B)
-INSTR2(2, SHR_B)
-INSTR2(2, ASHR_B)
-INSTR2(2, BARY_F)
-INSTR2(2, MGEN_B)
-INSTR2(2, GETBIT_B)
-INSTR1(2, SETRM)
-INSTR1(2, CBITS_B)
-INSTR2(2, SHB)
-INSTR2(2, MSAD)
+INSTR2(ADD_F)
+INSTR2(MIN_F)
+INSTR2(MAX_F)
+INSTR2(MUL_F)
+INSTR1(SIGN_F)
+INSTR2(CMPS_F)
+INSTR1(ABSNEG_F)
+INSTR2(CMPV_F)
+INSTR1(FLOOR_F)
+INSTR1(CEIL_F)
+INSTR1(RNDNE_F)
+INSTR1(RNDAZ_F)
+INSTR1(TRUNC_F)
+INSTR2(ADD_U)
+INSTR2(ADD_S)
+INSTR2(SUB_U)
+INSTR2(SUB_S)
+INSTR2(CMPS_U)
+INSTR2(CMPS_S)
+INSTR2(MIN_U)
+INSTR2(MIN_S)
+INSTR2(MAX_U)
+INSTR2(MAX_S)
+INSTR1(ABSNEG_S)
+INSTR2(AND_B)
+INSTR2(OR_B)
+INSTR1(NOT_B)
+INSTR2(XOR_B)
+INSTR2(CMPV_U)
+INSTR2(CMPV_S)
+INSTR2(MUL_U)
+INSTR2(MUL_S)
+INSTR2(MULL_U)
+INSTR1(BFREV_B)
+INSTR1(CLZ_S)
+INSTR1(CLZ_B)
+INSTR2(SHL_B)
+INSTR2(SHR_B)
+INSTR2(ASHR_B)
+INSTR2(BARY_F)
+INSTR2(MGEN_B)
+INSTR2(GETBIT_B)
+INSTR1(SETRM)
+INSTR1(CBITS_B)
+INSTR2(SHB)
+INSTR2(MSAD)
 
 /* cat3 instructions: */
-INSTR3(3, MAD_U16)
-INSTR3(3, MADSH_U16)
-INSTR3(3, MAD_S16)
-INSTR3(3, MADSH_M16)
-INSTR3(3, MAD_U24)
-INSTR3(3, MAD_S24)
-INSTR3(3, MAD_F16)
-INSTR3(3, MAD_F32)
-INSTR3(3, SEL_B16)
-INSTR3(3, SEL_B32)
-INSTR3(3, SEL_S16)
-INSTR3(3, SEL_S32)
-INSTR3(3, SEL_F16)
-INSTR3(3, SEL_F32)
-INSTR3(3, SAD_S16)
-INSTR3(3, SAD_S32)
+INSTR3(MAD_U16)
+INSTR3(MADSH_U16)
+INSTR3(MAD_S16)
+INSTR3(MADSH_M16)
+INSTR3(MAD_U24)
+INSTR3(MAD_S24)
+INSTR3(MAD_F16)
+INSTR3(MAD_F32)
+INSTR3(SEL_B16)
+INSTR3(SEL_B32)
+INSTR3(SEL_S16)
+INSTR3(SEL_S32)
+INSTR3(SEL_F16)
+INSTR3(SEL_F32)
+INSTR3(SAD_S16)
+INSTR3(SAD_S32)
 
 /* cat4 instructions: */
-INSTR1(4, RCP)
-INSTR1(4, RSQ)
-INSTR1(4, LOG2)
-INSTR1(4, EXP2)
-INSTR1(4, SIN)
-INSTR1(4, COS)
-INSTR1(4, SQRT)
+INSTR1(RCP)
+INSTR1(RSQ)
+INSTR1(LOG2)
+INSTR1(EXP2)
+INSTR1(SIN)
+INSTR1(COS)
+INSTR1(SQRT)
 
 /* cat5 instructions: */
-INSTR1(5, DSX)
-INSTR1(5, DSY)
+INSTR1(DSX)
+INSTR1(DSY)
 
 static inline struct ir3_instruction *
 ir3_SAM(struct ir3_block *block, opc_t opc, type_t type,
@@ -1081,7 +1078,7 @@ ir3_SAM(struct ir3_block *block, opc_t opc, type_t type,
        struct ir3_instruction *sam;
        struct ir3_register *reg;
 
-       sam = ir3_instr_create(block, 5, opc);
+       sam = ir3_instr_create(block, opc);
        sam->flags |= flags;
        ir3_reg_create(sam, 0, 0)->wrmask = wrmask;
        if (src0) {
@@ -1102,9 +1099,9 @@ ir3_SAM(struct ir3_block *block, opc_t opc, type_t type,
 }
 
 /* cat6 instructions: */
-INSTR2(6, LDLV)
-INSTR2(6, LDG)
-INSTR3(6, STG)
+INSTR2(LDLV)
+INSTR2(LDG)
+INSTR3(STG)
 
 /* ************************************************************************* */
 /* split this out or find some helper to use.. like main/bitset.h.. */

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 1f043e5..3f14412 100644 (file)
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -286,7 +286,7 @@ create_immed(struct ir3_block *block, uint32_t val)
 {
        struct ir3_instruction *mov;
 
-       mov = ir3_instr_create(block, 1, OPC_MOV);
+       mov = ir3_instr_create(block, OPC_MOV);
        mov->cat1.src_type = TYPE_U32;
        mov->cat1.dst_type = TYPE_U32;
        ir3_reg_create(mov, 0, 0);
@@ -366,7 +366,7 @@ create_uniform(struct ir3_compile *ctx, unsigned n)
 {
        struct ir3_instruction *mov;
 
-       mov = ir3_instr_create(ctx->block, 1, OPC_MOV);
+       mov = ir3_instr_create(ctx->block, OPC_MOV);
        /* TODO get types right? */
        mov->cat1.src_type = TYPE_F32;
        mov->cat1.dst_type = TYPE_F32;
@@ -382,7 +382,7 @@ create_uniform_indirect(struct ir3_compile *ctx, int n,
 {
        struct ir3_instruction *mov;
 
-       mov = ir3_instr_create(ctx->block, 1, OPC_MOV);
+       mov = ir3_instr_create(ctx->block, OPC_MOV);
        mov->cat1.src_type = TYPE_U32;
        mov->cat1.dst_type = TYPE_U32;
        ir3_reg_create(mov, 0, 0);
@@ -402,7 +402,7 @@ create_collect(struct ir3_block *block, struct ir3_instruction **arr,
        if (arrsz == 0)
                return NULL;
 
-       collect = ir3_instr_create2(block, -1, OPC_META_FI, 1 + arrsz);
+       collect = ir3_instr_create2(block, OPC_META_FI, 1 + arrsz);
        ir3_reg_create(collect, 0, 0);     /* dst */
        for (unsigned i = 0; i < arrsz; i++)
                ir3_reg_create(collect, 0, IR3_REG_SSA)->instr = arr[i];
@@ -418,7 +418,7 @@ create_indirect_load(struct ir3_compile *ctx, unsigned arrsz, int n,
        struct ir3_instruction *mov;
        struct ir3_register *src;
 
-       mov = ir3_instr_create(block, 1, OPC_MOV);
+       mov = ir3_instr_create(block, OPC_MOV);
        mov->cat1.src_type = TYPE_U32;
        mov->cat1.dst_type = TYPE_U32;
        ir3_reg_create(mov, 0, 0);
@@ -441,7 +441,7 @@ create_var_load(struct ir3_compile *ctx, struct ir3_array *arr, int n,
        struct ir3_instruction *mov;
        struct ir3_register *src;
 
-       mov = ir3_instr_create(block, 1, OPC_MOV);
+       mov = ir3_instr_create(block, OPC_MOV);
        mov->cat1.src_type = TYPE_U32;
        mov->cat1.dst_type = TYPE_U32;
        ir3_reg_create(mov, 0, 0);
@@ -469,7 +469,7 @@ create_var_store(struct ir3_compile *ctx, struct ir3_array *arr, int n,
        struct ir3_instruction *mov;
        struct ir3_register *dst;
 
-       mov = ir3_instr_create(block, 1, OPC_MOV);
+       mov = ir3_instr_create(block, OPC_MOV);
        mov->cat1.src_type = TYPE_U32;
        mov->cat1.dst_type = TYPE_U32;
        dst = ir3_reg_create(mov, 0, IR3_REG_ARRAY |
@@ -492,7 +492,7 @@ create_input(struct ir3_block *block, unsigned n)
 {
        struct ir3_instruction *in;
 
-       in = ir3_instr_create(block, -1, OPC_META_INPUT);
+       in = ir3_instr_create(block, OPC_META_INPUT);
        in->inout.block = block;
        ir3_reg_create(in, n, 0);
 
@@ -617,8 +617,7 @@ split_dest(struct ir3_block *block, struct ir3_instruction **dst,
 {
        struct ir3_instruction *prev = NULL;
        for (int i = 0, j = 0; i < n; i++) {
-               struct ir3_instruction *split =
-                               ir3_instr_create(block, -1, OPC_META_FO);
+               struct ir3_instruction *split = ir3_instr_create(block, OPC_META_FO);
                ir3_reg_create(split, 0, IR3_REG_SSA);
                ir3_reg_create(split, 0, IR3_REG_SSA)->instr = src;
                split->fo.off = i;
@@ -1631,7 +1630,7 @@ emit_phi(struct ir3_compile *ctx, nir_phi_instr *nphi)
 
        dst = get_dst(ctx, &nphi->dest, 1);
 
-       phi = ir3_instr_create2(ctx->block, -1, OPC_META_PHI,
+       phi = ir3_instr_create2(ctx->block, OPC_META_PHI,
                        1 + exec_list_length(&nphi->srcs));
        ir3_reg_create(phi, 0, 0);         /* dst */
        phi->phi.nphi = nphi;
@@ -2144,7 +2143,7 @@ emit_instructions(struct ir3_compile *ctx)
        if (ctx->so->type == SHADER_FRAGMENT) {
                // TODO maybe a helper for fi since we need it a few places..
                struct ir3_instruction *instr;
-               instr = ir3_instr_create(ctx->block, -1, OPC_META_FI);
+               instr = ir3_instr_create(ctx->block, OPC_META_FI);
                ir3_reg_create(instr, 0, 0);
                ir3_reg_create(instr, 0, IR3_REG_SSA);    /* r0.x */
                ir3_reg_create(instr, 0, IR3_REG_SSA);    /* r0.y */

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_group.c b/src/gallium/drivers/freedreno/ir3/ir3_group.c
index 7021296..cd59080 100644 (file)
--- a/src/gallium/drivers/freedreno/ir3/ir3_group.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_group.c
@@ -63,7 +63,7 @@ static void arr_insert_mov_in(void *arr, int idx, struct ir3_instruction *instr)
 
        debug_assert(instr->regs_count == 1);
 
-       in = ir3_instr_create(instr->block, -1, OPC_META_INPUT);
+       in = ir3_instr_create(instr->block, OPC_META_INPUT);
        in->inout.block = instr->block;
        ir3_reg_create(in, instr->regs[0]->num, 0);
 

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
index 613588d..77cd0e6 100644 (file)
--- a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
@@ -209,7 +209,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
                        struct ir3_instruction *baryf;
 
                        /* (ss)bary.f (ei)r63.x, 0, r0.x */
-                       baryf = ir3_instr_create(block, 2, OPC_BARY_F);
+                       baryf = ir3_instr_create(block, OPC_BARY_F);
                        baryf->flags |= IR3_INSTR_SS;
                        ir3_reg_create(baryf, regid(63, 0), 0);
                        ir3_reg_create(baryf, 0, IR3_REG_IMMED)->iim_val = 0;