radv: call nir_lower_io_to_temporaries for VS, GS, TES and FS

Do not lower FS inputs because this moves all load_var
instructions at beginning of shaders and because
interp_var_at_sample (and friends) seem broken. That might
be eventually enabled later on if we really want to preload
all FS inputs at beginning.

Polaris10:
Totals from affected shaders:
SGPRS: 54072 -> 54264 (0.36 %)
VGPRS: 38580 -> 38124 (-1.18 %)
Spilled SGPRs: 652 -> 652 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 2128116 -> 2127380 (-0.03 %) bytes
Max Waves: 8048 -> 8086 (0.47 %)

Vega10:
Totals from affected shaders:
SGPRS: 52616 -> 52656 (0.08 %)
VGPRS: 37536 -> 37116 (-1.12 %)
Spilled SGPRs: 828 -> 828 (0.00 %)
Code Size: 2043756 -> 2042672 (-0.05 %) bytes
Max Waves: 9176 -> 9254 (0.85 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 7ed5d2a..84ad215 100644 (file)
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -278,6 +278,16 @@ radv_shader_compile_to_nir(struct radv_device *device,
 
        nir_lower_vars_to_ssa(nir);
 
+       if (nir->info.stage == MESA_SHADER_VERTEX ||
+           nir->info.stage == MESA_SHADER_GEOMETRY) {
+               NIR_PASS_V(nir, nir_lower_io_to_temporaries,
+                          nir_shader_get_entrypoint(nir), true, true);
+       } else if (nir->info.stage == MESA_SHADER_TESS_EVAL||
+                  nir->info.stage == MESA_SHADER_FRAGMENT) {
+               NIR_PASS_V(nir, nir_lower_io_to_temporaries,
+                          nir_shader_get_entrypoint(nir), true, false);
+       }
+
        nir_split_var_copies(nir);
        nir_lower_var_copies(nir);