riscv: dts: microchip: add mpfs's CAN controllers
authorConor Dooley <conor.dooley@microchip.com>
Tue, 7 Jun 2022 06:55:00 +0000 (07:55 +0100)
committerMarc Kleine-Budde <mkl@pengutronix.de>
Mon, 13 Jun 2022 13:54:10 +0000 (15:54 +0200)
PolarFire SoC has a pair of CAN controllers, but as they were
undocumented there were omitted from the device tree. Add them.

Link: https://lore.kernel.org/all/20220607065459.2035746-3-conor.dooley@microchip.com
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
arch/riscv/boot/dts/microchip/mpfs.dtsi

index 8c32591..737e0e7 100644 (file)
                        status = "disabled";
                };
 
+               can0: can@2010c000 {
+                       compatible = "microchip,mpfs-can";
+                       reg = <0x0 0x2010c000 0x0 0x1000>;
+                       clocks = <&clkcfg CLK_CAN0>;
+                       interrupt-parent = <&plic>;
+                       interrupts = <56>;
+                       status = "disabled";
+               };
+
+               can1: can@2010d000 {
+                       compatible = "microchip,mpfs-can";
+                       reg = <0x0 0x2010d000 0x0 0x1000>;
+                       clocks = <&clkcfg CLK_CAN1>;
+                       interrupt-parent = <&plic>;
+                       interrupts = <57>;
+                       status = "disabled";
+               };
+
                mac0: ethernet@20110000 {
                        compatible = "cdns,macb";
                        reg = <0x0 0x20110000 0x0 0x2000>;