* gpio[1]: HOST_GPIO32->HOST_GPIO55
*/
#define MLXBF3_GPIO_MAX_PINS_PER_BLOCK 32
+#define MLXBF3_GPIO_MAX_PINS_BLOCK0 32
+#define MLXBF3_GPIO_MAX_PINS_BLOCK1 24
/*
* fw_gpio[x] block registers and their offset
GPIOCHIP_IRQ_RESOURCE_HELPERS,
};
+static int mlxbf3_gpio_add_pin_ranges(struct gpio_chip *chip)
+{
+ unsigned int id;
+
+ switch(chip->ngpio) {
+ case MLXBF3_GPIO_MAX_PINS_BLOCK0:
+ id = 0;
+ break;
+ case MLXBF3_GPIO_MAX_PINS_BLOCK1:
+ id = 1;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return gpiochip_add_pin_range(chip, "MLNXBF34:00",
+ chip->base, id * MLXBF3_GPIO_MAX_PINS_PER_BLOCK,
+ chip->ngpio);
+}
+
static int mlxbf3_gpio_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
gc->request = gpiochip_generic_request;
gc->free = gpiochip_generic_free;
gc->owner = THIS_MODULE;
+ gc->add_pin_ranges = mlxbf3_gpio_add_pin_ranges;
irq = platform_get_irq(pdev, 0);
if (irq >= 0) {
};
module_platform_driver(mlxbf3_gpio_driver);
+MODULE_SOFTDEP("pre: pinctrl-mlxbf3");
MODULE_DESCRIPTION("NVIDIA BlueField-3 GPIO Driver");
MODULE_AUTHOR("Asmaa Mnebhi <asmaa@nvidia.com>");
MODULE_LICENSE("Dual BSD/GPL");