phy: qcom-qmp-pcie: sc8180x PCIe PHY has 2 lanes
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fri, 31 Mar 2023 15:12:49 +0000 (18:12 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 11 May 2023 14:02:59 +0000 (23:02 +0900)
commit 1db6b0a4246ce708b89f5136571130b9987741d1 upstream.

All PCIe PHYs on sc8180x platform have 2 lanes, so change the number of
lanes to 2.

Fixes: f839f14e24f2 ("phy: qcom-qmp: Add sc8180x PCIe support")
Cc: stable@vger.kernel.org # 5.15
Sgned-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230331151250.4049-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

index bb40172..876a713 100644 (file)
@@ -1738,7 +1738,7 @@ static const struct qmp_phy_cfg msm8998_pciephy_cfg = {
 };
 
 static const struct qmp_phy_cfg sc8180x_pciephy_cfg = {
-       .lanes                  = 1,
+       .lanes                  = 2,
 
        .tables = {
                .serdes         = sc8180x_qmp_pcie_serdes_tbl,