configs: zynq: Enable zynq qspi controller
authorJagan Teki <jteki@openedev.com>
Mon, 31 Aug 2015 12:08:40 +0000 (17:38 +0530)
committerJagan Teki <jteki@openedev.com>
Sun, 25 Oct 2015 14:47:02 +0000 (20:17 +0530)
Enable zynq qspi controller driver on respective zynq boards.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
configs/zynq_microzed_defconfig
configs/zynq_zc702_defconfig
configs/zynq_zc706_defconfig
configs/zynq_zc70x_defconfig
configs/zynq_zc770_xm010_defconfig
configs/zynq_zed_defconfig

index 130851e..9cb2ca1 100644 (file)
@@ -12,3 +12,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index db2e92c..c4922f3 100644 (file)
@@ -11,3 +11,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index 87158ab..b4c076c 100644 (file)
@@ -12,3 +12,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index 4f10c8a..97f8a5d 100644 (file)
@@ -12,3 +12,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index 0e826bb..61106df 100644 (file)
@@ -13,3 +13,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010"
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y
index 0f99975..5e128fb 100644 (file)
@@ -12,3 +12,4 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
+CONFIG_ZYNQ_QSPI=y