drm/amd/display: Fix bug preventing FCLK Pstate allow message being sent
authorDillon Varone <Dillon.Varone@amd.com>
Sat, 1 Oct 2022 15:51:48 +0000 (11:51 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 10 Oct 2022 21:32:55 +0000 (17:32 -0400)
[Why & How]
FCLK pstate allow message should not be dependent on local
"update_fclk".

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

index 99ae325..1c612cc 100644 (file)
@@ -342,8 +342,8 @@ static void dcn32_update_clocks(struct clk_mgr *clk_mgr_base,
                if (should_update_pstate_support(safe_to_lower, fclk_p_state_change_support, clk_mgr_base->clks.fclk_p_state_change_support)) {
                        clk_mgr_base->clks.fclk_p_state_change_support = fclk_p_state_change_support;
 
-                       /* To enable FCLK P-state switching, send FCLK_PSTATE_NOTSUPPORTED message to PMFW */
-                       if (clk_mgr_base->ctx->dce_version != DCN_VERSION_3_21 && clk_mgr_base->clks.fclk_p_state_change_support && update_fclk) {
+                       /* To enable FCLK P-state switching, send FCLK_PSTATE_SUPPORTED message to PMFW */
+                       if (clk_mgr_base->ctx->dce_version != DCN_VERSION_3_21 && clk_mgr_base->clks.fclk_p_state_change_support) {
                                /* Handle the code for sending a message to PMFW that FCLK P-state change is supported */
                                dcn32_smu_send_fclk_pstate_message(clk_mgr, FCLK_PSTATE_SUPPORTED);
                        }