emmc: optimizing emmc hs400 timing process
authorLong Yu <long.yu@amlogic.com>
Fri, 11 Aug 2017 09:09:13 +0000 (17:09 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Mon, 14 Aug 2017 02:24:16 +0000 (19:24 -0700)
PD#148082: emmc: optimizing emmc hs400 timing process

Change-Id: I0318dec3e0c89eef3a396b157ada97b2ef768f7f
Signed-off-by: Long Yu <long.yu@amlogic.com>
drivers/amlogic/mmc/aml_sd_emmc_v3.c

index 21dffdb..640b156 100644 (file)
@@ -905,7 +905,7 @@ tunning:
        vctrl = readl(host->base + SD_EMMC_CFG);
        clk_div = clkc->div;
        clock = clk_rate / clk_div;/*200MHz, bus_clk */
-       pdata->mmc->actual_clock = ctrl->ddr ?
+       mmc->actual_clock = ctrl->ddr ?
                                (clock / 2) : clock;/*100MHz in ddr */
 
        if (ctrl->ddr == 1) {
@@ -1028,9 +1028,6 @@ tunning:
                        readl(host->base + SD_EMMC_CLOCK_V3),
                        readl(host->base + SD_EMMC_ADJUST_V3));
        kfree(blk_test);
-       /* do not dynamical tuning for no emmc device */
-       if ((pdata->is_in) && !aml_card_type_mmc(pdata))
-               schedule_delayed_work(&pdata->retuning, 15*HZ);
        return ret;
 #endif
        return 0;