i386.md (*movdfcc_1): Merge with *movdfcc_1_rex64.

	* config/i386/i386.md (*movdfcc_1): Merge with *movdfcc_1_rex64.
	Use x64 and nox64 isa attributes.

From-SVN: r197101

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dd61f15..d5f829f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-03-26  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*movdfcc_1): Merge with *movdfcc_1_rex64.
+       Use x64 and nox64 isa attributes.
+
 2013-03-26  Richard Biener  <rguenther@suse.de>
 
        * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6a95e01..5df07f6 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -15969,37 +15969,26 @@
   [(set_attr "type" "fcmov")
    (set_attr "mode" "XF")])
 
-(define_insn "*movdfcc_1_rex64"
-  [(set (match_operand:DF 0 "register_operand" "=f,f,r,r")
-       (if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
-                               [(reg FLAGS_REG) (const_int 0)])
-                     (match_operand:DF 2 "nonimmediate_operand" "f,0,rm,0")
-                     (match_operand:DF 3 "nonimmediate_operand" "0,f,0,rm")))]
-  "TARGET_64BIT && TARGET_80387 && TARGET_CMOVE
-   && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
-  "@
-   fcmov%F1\t{%2, %0|%0, %2}
-   fcmov%f1\t{%3, %0|%0, %3}
-   cmov%O2%C1\t{%2, %0|%0, %2}
-   cmov%O2%c1\t{%3, %0|%0, %3}"
-  [(set_attr "type" "fcmov,fcmov,icmov,icmov")
-   (set_attr "mode" "DF,DF,DI,DI")])
-
 (define_insn "*movdfcc_1"
-  [(set (match_operand:DF 0 "register_operand" "=f,f,&r,&r")
+  [(set (match_operand:DF 0 "register_operand" "=f,f,&r,&r,r ,r")
        (if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
                                [(reg FLAGS_REG) (const_int 0)])
-                     (match_operand:DF 2 "nonimmediate_operand" "f,0,rm,0")
-                     (match_operand:DF 3 "nonimmediate_operand" "0,f,0,rm")))]
-  "!TARGET_64BIT && TARGET_80387 && TARGET_CMOVE
+                     (match_operand:DF 2 "nonimmediate_operand"
+                                              "f ,0,rm,0 ,rm,0")
+                     (match_operand:DF 3 "nonimmediate_operand"
+                                              "0 ,f,0 ,rm,0, rm")))]
+  "TARGET_80387 && TARGET_CMOVE
    && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
   "@
    fcmov%F1\t{%2, %0|%0, %2}
    fcmov%f1\t{%3, %0|%0, %3}
    #
-   #"
-  [(set_attr "type" "fcmov,fcmov,multi,multi")
-   (set_attr "mode" "DF,DF,DI,DI")])
+   #
+   cmov%O2%C1\t{%2, %0|%0, %2}
+   cmov%O2%c1\t{%3, %0|%0, %3}"
+  [(set_attr "isa" "*,*,nox64,nox64,x64,x64")
+   (set_attr "type" "fcmov,fcmov,multi,multi,icmov,icmov")
+   (set_attr "mode" "DF,DF,DI,DI,DI,DI")])
 
 (define_split
   [(set (match_operand:DF 0 "register_and_not_any_fp_reg_operand")