[(set_attr "type" "fcmov")
(set_attr "mode" "XF")])
-(define_insn "*movdfcc_1_rex64"
- [(set (match_operand:DF 0 "register_operand" "=f,f,r,r")
- (if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
- [(reg FLAGS_REG) (const_int 0)])
- (match_operand:DF 2 "nonimmediate_operand" "f,0,rm,0")
- (match_operand:DF 3 "nonimmediate_operand" "0,f,0,rm")))]
- "TARGET_64BIT && TARGET_80387 && TARGET_CMOVE
- && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
- "@
- fcmov%F1\t{%2, %0|%0, %2}
- fcmov%f1\t{%3, %0|%0, %3}
- cmov%O2%C1\t{%2, %0|%0, %2}
- cmov%O2%c1\t{%3, %0|%0, %3}"
- [(set_attr "type" "fcmov,fcmov,icmov,icmov")
- (set_attr "mode" "DF,DF,DI,DI")])
-
(define_insn "*movdfcc_1"
- [(set (match_operand:DF 0 "register_operand" "=f,f,&r,&r")
+ [(set (match_operand:DF 0 "register_operand" "=f,f,&r,&r,r ,r")
(if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
[(reg FLAGS_REG) (const_int 0)])
- (match_operand:DF 2 "nonimmediate_operand" "f,0,rm,0")
- (match_operand:DF 3 "nonimmediate_operand" "0,f,0,rm")))]
- "!TARGET_64BIT && TARGET_80387 && TARGET_CMOVE
+ (match_operand:DF 2 "nonimmediate_operand"
+ "f ,0,rm,0 ,rm,0")
+ (match_operand:DF 3 "nonimmediate_operand"
+ "0 ,f,0 ,rm,0, rm")))]
+ "TARGET_80387 && TARGET_CMOVE
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"@
fcmov%F1\t{%2, %0|%0, %2}
fcmov%f1\t{%3, %0|%0, %3}
#
- #"
- [(set_attr "type" "fcmov,fcmov,multi,multi")
- (set_attr "mode" "DF,DF,DI,DI")])
+ #
+ cmov%O2%C1\t{%2, %0|%0, %2}
+ cmov%O2%c1\t{%3, %0|%0, %3}"
+ [(set_attr "isa" "*,*,nox64,nox64,x64,x64")
+ (set_attr "type" "fcmov,fcmov,multi,multi,icmov,icmov")
+ (set_attr "mode" "DF,DF,DI,DI,DI,DI")])
(define_split
[(set (match_operand:DF 0 "register_and_not_any_fp_reg_operand")