bool
isl_surf_supports_ccs(const struct isl_device *dev,
- const struct isl_surf *surf)
+ const struct isl_surf *surf,
+ const struct isl_surf *hiz_or_mcs_surf)
{
/* CCS support does not exist prior to Gfx7 */
if (ISL_GFX_VER(dev) <= 6)
return false;
if (ISL_GFX_VER(dev) >= 12) {
- if (isl_surf_usage_is_stencil(surf->usage) && surf->samples > 1)
- return false;
+ if (isl_surf_usage_is_stencil(surf->usage)) {
+ /* HiZ and MCS aren't allowed with stencil */
+ assert(hiz_or_mcs_surf == NULL || hiz_or_mcs_surf->size_B == 0);
+
+ /* Multi-sampled stencil cannot have CCS */
+ if (surf->samples > 1)
+ return false;
+ } else if (isl_surf_usage_is_depth(surf->usage)) {
+ const struct isl_surf *hiz_surf = hiz_or_mcs_surf;
+
+ /* With depth surfaces, HIZ is required for CCS. */
+ if (hiz_surf == NULL || hiz_surf->size_B == 0)
+ return false;
+
+ assert(hiz_surf->usage & ISL_SURF_USAGE_HIZ_BIT);
+ assert(hiz_surf->tiling == ISL_TILING_HIZ);
+ assert(hiz_surf->format == ISL_FORMAT_HIZ);
+ } else if (surf->samples > 1) {
+ const struct isl_surf *mcs_surf = hiz_or_mcs_surf;
+
+ /* With multisampled color, CCS requires MCS */
+ if (mcs_surf == NULL || mcs_surf->size_B == 0)
+ return false;
+
+ assert(mcs_surf->usage & ISL_SURF_USAGE_MCS_BIT);
+ assert(isl_tiling_is_any_y(mcs_surf->tiling));
+ assert(isl_format_is_mcs(mcs_surf->format));
+ } else {
+ /* Single-sampled color can't have MCS or HiZ */
+ assert(hiz_or_mcs_surf == NULL || hiz_or_mcs_surf->size_B == 0);
+ }
/* On Gfx12, all CCS-compressed surface pitches must be multiples of
* 512B.
if (isl_surf_usage_is_depth_or_stencil(surf->usage))
return false;
+ /* We're single-sampled color so having HiZ or MCS makes no sense */
+ assert(hiz_or_mcs_surf == NULL || hiz_or_mcs_surf->size_B == 0);
+
/* The PRM doesn't say this explicitly, but fast-clears don't appear to
* work for 3D textures until gfx9 where the layout of 3D textures
* changes to match 2D array textures.
assert(extra_aux_surf);
assert(!(aux_surf->usage & ISL_SURF_USAGE_CCS_BIT));
- if (!isl_surf_supports_ccs(dev, surf))
+ const struct isl_surf *hiz_or_mcs_surf =
+ aux_surf->size_B > 0 ? aux_surf : NULL;
+ struct isl_surf *ccs_surf =
+ aux_surf->size_B > 0 ? extra_aux_surf : aux_surf;
+
+ if (!isl_surf_supports_ccs(dev, surf, hiz_or_mcs_surf))
return false;
if (ISL_GFX_VER(dev) >= 12) {
- /* With depth surfaces, HIZ is required for CCS. */
- if (surf->usage & ISL_SURF_USAGE_DEPTH_BIT &&
- aux_surf->tiling != ISL_TILING_HIZ)
- return false;
-
enum isl_format ccs_format;
switch (isl_format_get_layout(surf->format)->bpb) {
case 8: ccs_format = ISL_FORMAT_GFX12_CCS_8BPP_Y0; break;
/* On Gfx12, the CCS is a scaled-down version of the main surface. We
* model this as the CCS compressing a 2D-view of the entire surface.
*/
- struct isl_surf *ccs_surf =
- aux_surf->size_B > 0 ? extra_aux_surf : aux_surf;
const bool ok =
isl_surf_init(dev, ccs_surf,
.dim = ISL_SURF_DIM_2D,
unreachable("Invalid tiling format");
}
- return isl_surf_init(dev, aux_surf,
+ return isl_surf_init(dev, ccs_surf,
.dim = surf->dim,
.format = ccs_format,
.width = surf->logical_level0_px.width,
&image->planes[plane].aux_surface.isl);
assert(ok);
if (!isl_surf_supports_ccs(&device->isl_dev,
- &image->planes[plane].primary_surface.isl)) {
+ &image->planes[plane].primary_surface.isl,
+ &image->planes[plane].aux_surface.isl)) {
image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
} else if (image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) &&
return VK_SUCCESS;
if (!isl_surf_supports_ccs(&device->isl_dev,
- &image->planes[plane].primary_surface.isl))
+ &image->planes[plane].primary_surface.isl,
+ NULL))
return VK_SUCCESS;
image->planes[plane].aux_usage = ISL_AUX_USAGE_STC_CCS;