drm/amd/display: Enable P-state validation checks for DCN314
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Fri, 27 Jan 2023 15:03:45 +0000 (10:03 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 14 Feb 2023 21:00:31 +0000 (16:00 -0500)
[Why]
To align with DCN31 behavior. This helps avoid p-state hangs in
the case where underflow does occur.

[How]
Flip the bit to true.

Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c

index 79850a68f62ab0719e8c9c572f2f2e3c3f7aeb47..bc7f2b735327efb3c2624f529635cf98b76dd285 100644 (file)
@@ -901,7 +901,7 @@ static const struct dc_debug_options debug_defaults_drv = {
        .max_downscale_src_width = 4096,/*upto true 4k*/
        .disable_pplib_wm_range = false,
        .scl_reset_length10 = true,
-       .sanity_checks = false,
+       .sanity_checks = true,
        .underflow_assert_delay_us = 0xFFFFFFFF,
        .dwb_fi_phase = -1, // -1 = disable,
        .dmub_command_table = true,