drm/amd/display: Remove dc_stream_state->status

[Why]
dc_state has an array of dc_stream_status that contain
pointers to the dc_plane_state and other useful information

Confusingly, dc_stream_state also contains a dc_stream_status
called status.  This struct was partially initialized and
used in a few places

[How]
stream->status.link has been replaced with stream->sink->link.
If a stream does not have a sink, or a sink does not have a link,
something has gone seriously wrong

All other properties of stream->status were zeroed by kzalloc
and never initialized, so they have been replaced by the number 0

This is a refactor: no functional change is intended

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 3279e26..1d8bd55 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -328,7 +328,7 @@ void dc_stream_set_dither_option(struct dc_stream_state *stream,
                enum dc_dither_option option)
 {
        struct bit_depth_reduction_params params;
-       struct dc_link *link = stream->status.link;
+       struct dc_link *link = stream->sink->link;
        struct pipe_ctx *pipes = NULL;
        int i;
 

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index e113439..780838a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -100,8 +100,6 @@ static void construct(struct dc_stream_state *stream,
        /* EDID CAP translation for HDMI 2.0 */
        stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;
 
-       stream->status.link = stream->sink->link;
-
        update_stream_signal(stream);
 
        stream->out_transfer_func = dc_create_transfer_func();

diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index c5bd1fb..771d9f1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -104,8 +104,6 @@ struct dc_stream_state {
        bool dpms_off;
        bool apply_edp_fast_boot_optimization;
 
-       struct dc_stream_status status;
-
        struct dc_cursor_attributes cursor_attributes;
        struct dc_cursor_position cursor_position;
        uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 9724a17..2f062ba 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -2282,7 +2282,7 @@ static void dce110_enable_per_frame_crtc_position_reset(
        int i;
 
        gsl_params.gsl_group = 0;
-       gsl_params.gsl_master = grouped_pipes[0]->stream->triggered_crtc_reset.event_source->status.primary_otg_inst;
+       gsl_params.gsl_master = 0;
 
        for (i = 0; i < group_size; i++)
                grouped_pipes[i]->stream_res.tg->funcs->setup_global_swap_lock(

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 87495de..6b8a4da 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1400,7 +1400,7 @@ static void dcn10_enable_per_frame_crtc_position_reset(
                if (grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset)
                        grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset(
                                        grouped_pipes[i]->stream_res.tg,
-                                       grouped_pipes[i]->stream->triggered_crtc_reset.event_source->status.primary_otg_inst,
+                                       0,
                                        &grouped_pipes[i]->stream->triggered_crtc_reset);
 
        DC_SYNC_INFO("Waiting for trigger\n");