; Check this is converted into canonical form, as above.
define i64 @t2(i32 %a) {
; CHECK-LABEL: @t2(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 5)
-; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64
-; CHECK-NEXT: ret i64 [[TMP2]]
+; CHECK-NEXT: [[NARROW:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 5)
+; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[NARROW]] to i64
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%1 = icmp slt i32 %a, 5
%2 = sext i32 %a to i64
; Same as @t2, with flipped operands and zext instead of sext.
define i64 @t3(i32 %a) {
; CHECK-LABEL: @t3(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 5)
-; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
-; CHECK-NEXT: ret i64 [[TMP2]]
+; CHECK-NEXT: [[NARROW:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 5)
+; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[NARROW]] to i64
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%1 = icmp ult i32 %a, 5
%2 = zext i32 %a to i64
; Same as @t3, but with mismatched signedness between icmp and zext.
define i64 @t5(i32 %a) {
; CHECK-LABEL: @t5(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 5)
-; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
-; CHECK-NEXT: ret i64 [[TMP2]]
+; CHECK-NEXT: [[NARROW:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 5)
+; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[NARROW]] to i64
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%1 = icmp slt i32 %a, 5
%2 = zext i32 %a to i64
define float @t10(i32 %x) {
; CHECK-LABEL: @t10(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 255)
-; CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
-; CHECK-NEXT: ret float [[TMP2]]
+; CHECK-NEXT: [[R1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[R:%.*]] = sitofp i32 [[R1]] to float
+; CHECK-NEXT: ret float [[R]]
;
%f_x = sitofp i32 %x to float
%cmp = icmp sgt i32 %x, 255
define float @t11(i64 %x) {
; CHECK-LABEL: @t11(
-; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[X:%.*]], i64 255)
-; CHECK-NEXT: [[TMP2:%.*]] = sitofp i64 [[TMP1]] to float
-; CHECK-NEXT: ret float [[TMP2]]
+; CHECK-NEXT: [[R1:%.*]] = call i64 @llvm.smax.i64(i64 [[X:%.*]], i64 255)
+; CHECK-NEXT: [[R:%.*]] = sitofp i64 [[R1]] to float
+; CHECK-NEXT: ret float [[R]]
;
%f_x = sitofp i64 %x to float
%cmp = icmp sgt i64 %x, 255
; SMIN(SMIN(X, 11), 92) -> SMIN(X, 11)
define i32 @test68(i32 %x) {
; CHECK-LABEL: @test68(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 11)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 11)
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 11, %x
%cond = select i1 %cmp, i32 11, i32 %x
define <2 x i32> @test68vec(<2 x i32> %x) {
; CHECK-LABEL: @test68vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 11, i32 11>)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[COND:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 11, i32 11>)
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%cmp = icmp slt <2 x i32> <i32 11, i32 11>, %x
%cond = select <2 x i1> %cmp, <2 x i32> <i32 11, i32 11>, <2 x i32> %x
; MIN(MIN(X, 24), 83) -> MIN(X, 24)
define i32 @test69(i32 %x) {
; CHECK-LABEL: @test69(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 24)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 24)
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp ult i32 24, %x
%cond = select i1 %cmp, i32 24, i32 %x
; SMAX(SMAX(X, 75), 36) -> SMAX(X, 75)
define i32 @test70(i32 %x) {
; CHECK-LABEL: @test70(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 75)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 75)
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 75
%cond = select i1 %cmp, i32 75, i32 %x
; MAX(MAX(X, 68), 47) -> MAX(X, 68)
define i32 @test71(i32 %x) {
; CHECK-LABEL: @test71(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 68)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 68)
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp ult i32 %x, 68
%cond = select i1 %cmp, i32 68, i32 %x
; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11)
define i32 @test72(i32 %x) {
; CHECK-LABEL: @test72(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 11)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[RETVAL:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 11)
+; CHECK-NEXT: ret i32 [[RETVAL]]
;
%cmp = icmp sgt i32 %x, 92
%cond = select i1 %cmp, i32 92, i32 %x
define <2 x i32> @test72vec(<2 x i32> %x) {
; CHECK-LABEL: @test72vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 11, i32 11>)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[RETVAL:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 11, i32 11>)
+; CHECK-NEXT: ret <2 x i32> [[RETVAL]]
;
%cmp = icmp sgt <2 x i32> %x, <i32 92, i32 92>
%cond = select <2 x i1> %cmp, <2 x i32> <i32 92, i32 92>, <2 x i32> %x
; MIN(MIN(X, 83), 24) -> MIN(X, 24)
define i32 @test73(i32 %x) {
; CHECK-LABEL: @test73(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 24)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[RETVAL:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 24)
+; CHECK-NEXT: ret i32 [[RETVAL]]
;
%cmp = icmp ugt i32 %x, 83
%cond = select i1 %cmp, i32 83, i32 %x
; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75)
define i32 @test74(i32 %x) {
; CHECK-LABEL: @test74(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 36)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 75)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 36)
+; CHECK-NEXT: [[RETVAL:%.*]] = call i32 @llvm.umax.i32(i32 [[COND]], i32 75)
+; CHECK-NEXT: ret i32 [[RETVAL]]
;
%cmp = icmp slt i32 %x, 36
%cond = select i1 %cmp, i32 36, i32 %x
; MAX(MAX(X, 47), 68) -> MAX(X, 68)
define i32 @test75(i32 %x) {
; CHECK-LABEL: @test75(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 68)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[RETVAL:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 68)
+; CHECK-NEXT: ret i32 [[RETVAL]]
;
%cmp = icmp ult i32 %x, 47
%cond = select i1 %cmp, i32 47, i32 %x
define i32 @clamp_signed1(i32 %x) {
; CHECK-LABEL: @clamp_signed1(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 255)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 15)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smax.i32(i32 [[MIN]], i32 15)
+; CHECK-NEXT: ret i32 [[R]]
;
%cmp2 = icmp slt i32 %x, 255
%min = select i1 %cmp2, i32 %x, i32 255
define i32 @clamp_signed2(i32 %x) {
; CHECK-LABEL: @clamp_signed2(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 15)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 255)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 15)
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smin.i32(i32 [[MAX]], i32 255)
+; CHECK-NEXT: ret i32 [[R]]
;
%cmp2 = icmp sgt i32 %x, 15
%max = select i1 %cmp2, i32 %x, i32 15
define i32 @clamp_signed3(i32 %x) {
; CHECK-LABEL: @clamp_signed3(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 255)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 15)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smax.i32(i32 [[MIN]], i32 15)
+; CHECK-NEXT: ret i32 [[R]]
;
%cmp2 = icmp slt i32 %x, 255
%min = select i1 %cmp2, i32 %x, i32 255
define i32 @clamp_signed4(i32 %x) {
; CHECK-LABEL: @clamp_signed4(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 15)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 255)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 15)
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smin.i32(i32 [[MAX]], i32 255)
+; CHECK-NEXT: ret i32 [[R]]
;
%cmp2 = icmp sgt i32 %x, 15
%max = select i1 %cmp2, i32 %x, i32 15
define i32 @clamp_unsigned1(i32 %x) {
; CHECK-LABEL: @clamp_unsigned1(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 255)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 15)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umax.i32(i32 [[MIN]], i32 15)
+; CHECK-NEXT: ret i32 [[R]]
;
%cmp2 = icmp ult i32 %x, 255
%min = select i1 %cmp2, i32 %x, i32 255
define i32 @clamp_unsigned2(i32 %x) {
; CHECK-LABEL: @clamp_unsigned2(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 15)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 255)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 15)
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umin.i32(i32 [[MAX]], i32 255)
+; CHECK-NEXT: ret i32 [[R]]
;
%cmp2 = icmp ugt i32 %x, 15
%max = select i1 %cmp2, i32 %x, i32 15
define i32 @clamp_unsigned3(i32 %x) {
; CHECK-LABEL: @clamp_unsigned3(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 255)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 15)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umax.i32(i32 [[MIN]], i32 15)
+; CHECK-NEXT: ret i32 [[R]]
;
%cmp2 = icmp ult i32 %x, 255
%min = select i1 %cmp2, i32 %x, i32 255
define i32 @clamp_unsigned4(i32 %x) {
; CHECK-LABEL: @clamp_unsigned4(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 15)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 255)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 15)
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umin.i32(i32 [[MAX]], i32 255)
+; CHECK-NEXT: ret i32 [[R]]
;
%cmp2 = icmp ugt i32 %x, 15
%max = select i1 %cmp2, i32 %x, i32 15
; (icmp sgt smin(PositiveA, B) 0) -> (icmp sgt B 0)
define i32 @clamp_check_for_no_infinite_loop1(i32 %i) {
; CHECK-LABEL: @clamp_check_for_no_infinite_loop1(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[I:%.*]], i32 255)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 0)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[SEL1:%.*]] = call i32 @llvm.smin.i32(i32 [[I:%.*]], i32 255)
+; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.smax.i32(i32 [[SEL1]], i32 0)
+; CHECK-NEXT: ret i32 [[RES]]
;
%cmp1 = icmp slt i32 %i, 255
%sel1 = select i1 %cmp1, i32 %i, i32 255
; (icmp slt smax(NegativeA, B) 0) -> (icmp slt B 0)
define i32 @clamp_check_for_no_infinite_loop2(i32 %i) {
; CHECK-LABEL: @clamp_check_for_no_infinite_loop2(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[I:%.*]], i32 -255)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 0)
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[SEL1:%.*]] = call i32 @llvm.smax.i32(i32 [[I:%.*]], i32 -255)
+; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.smin.i32(i32 [[SEL1]], i32 0)
+; CHECK-NEXT: ret i32 [[RES]]
;
%cmp1 = icmp sgt i32 %i, -255
%sel1 = select i1 %cmp1, i32 %i, i32 -255
; CHECK-LABEL: @clamp_check_for_no_infinite_loop3(
; CHECK-NEXT: br i1 true, label [[TRUELABEL:%.*]], label [[FALSELABEL:%.*]]
; CHECK: truelabel:
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[I:%.*]], i32 1)
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 2)
-; CHECK-NEXT: [[I7:%.*]] = shl nuw nsw i32 [[TMP2]], 2
+; CHECK-NEXT: [[I3:%.*]] = call i32 @llvm.smax.i32(i32 [[I:%.*]], i32 1)
+; CHECK-NEXT: [[I6:%.*]] = call i32 @llvm.umin.i32(i32 [[I3]], i32 2)
+; CHECK-NEXT: [[I7:%.*]] = shl nuw nsw i32 [[I6]], 2
; CHECK-NEXT: ret i32 [[I7]]
; CHECK: falselabel:
; CHECK-NEXT: ret i32 0
define double @PR31751_umin1(i32 %x) {
; CHECK-LABEL: @PR31751_umin1(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
+; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp slt i32 %x, 0
define double @PR31751_umin2(i32 %x) {
; CHECK-LABEL: @PR31751_umin2(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
+; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp ult i32 %x, 2147483647
define double @PR31751_umin3(i32 %x) {
; CHECK-LABEL: @PR31751_umin3(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
+; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp ugt i32 %x, 2147483647
define double @PR31751_umax1(i32 %x) {
; CHECK-LABEL: @PR31751_umax1(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
+; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp sgt i32 %x, -1
define double @PR31751_umax2(i32 %x) {
; CHECK-LABEL: @PR31751_umax2(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
+; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp ugt i32 %x, 2147483648
define double @PR31751_umax3(i32 %x) {
; CHECK-LABEL: @PR31751_umax3(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
+; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp ult i32 %x, 2147483648
; CHECK-LABEL: @bitcast_scalar_smax(
; CHECK-NEXT: [[BCX:%.*]] = bitcast float [[X:%.*]] to i32
; CHECK-NEXT: [[BCY:%.*]] = bitcast float [[Y:%.*]] to i32
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[BCX]], i32 [[BCY]])
-; CHECK-NEXT: [[BCS:%.*]] = bitcast i32 [[TMP1]] to float
+; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.smax.i32(i32 [[BCX]], i32 [[BCY]])
+; CHECK-NEXT: [[BCS:%.*]] = bitcast i32 [[SEL]] to float
; CHECK-NEXT: ret float [[BCS]]
;
%bcx = bitcast float %x to i32
; CHECK-LABEL: @bitcast_vector_smin(
; CHECK-NEXT: [[BCX:%.*]] = bitcast <8 x float> [[X:%.*]] to <8 x i32>
; CHECK-NEXT: [[BCY:%.*]] = bitcast <8 x float> [[Y:%.*]] to <8 x i32>
-; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> [[BCX]], <8 x i32> [[BCY]])
-; CHECK-NEXT: [[BCS:%.*]] = bitcast <8 x i32> [[TMP1]] to <8 x float>
+; CHECK-NEXT: [[SEL:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> [[BCX]], <8 x i32> [[BCY]])
+; CHECK-NEXT: [[BCS:%.*]] = bitcast <8 x i32> [[SEL]] to <8 x float>
; CHECK-NEXT: ret <8 x float> [[BCS]]
;
%bcx = bitcast <8 x float> %x to <8 x i32>
define zeroext i8 @look_through_cast1(i32 %x) {
; CHECK-LABEL: @look_through_cast1(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 511)
-; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
-; CHECK-NEXT: ret i8 [[TMP2]]
+; CHECK-NEXT: [[RES1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 511)
+; CHECK-NEXT: [[RES:%.*]] = trunc i32 [[RES1]] to i8
+; CHECK-NEXT: ret i8 [[RES]]
;
%cmp1 = icmp slt i32 %x, 511
%x_trunc = trunc i32 %x to i8
define <2 x i8> @min_through_cast_vec1(<2 x i32> %x) {
; CHECK-LABEL: @min_through_cast_vec1(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 510, i32 511>)
-; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i32> [[TMP1]] to <2 x i8>
-; CHECK-NEXT: ret <2 x i8> [[TMP2]]
+; CHECK-NEXT: [[RES1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 510, i32 511>)
+; CHECK-NEXT: [[RES:%.*]] = trunc <2 x i32> [[RES1]] to <2 x i8>
+; CHECK-NEXT: ret <2 x i8> [[RES]]
;
%cmp = icmp slt <2 x i32> %x, <i32 510, i32 511>
%x_trunc = trunc <2 x i32> %x to <2 x i8>
define <2 x i8> @min_through_cast_vec2(<2 x i32> %x) {
; CHECK-LABEL: @min_through_cast_vec2(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 511, i32 511>)
-; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i32> [[TMP1]] to <2 x i8>
-; CHECK-NEXT: ret <2 x i8> [[TMP2]]
+; CHECK-NEXT: [[RES1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 511, i32 511>)
+; CHECK-NEXT: [[RES:%.*]] = trunc <2 x i32> [[RES1]] to <2 x i8>
+; CHECK-NEXT: ret <2 x i8> [[RES]]
;
%cmp = icmp slt <2 x i32> %x, <i32 511, i32 511>
%x_trunc = trunc <2 x i32> %x to <2 x i8>
define i32 @common_factor_smin(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_smin(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[B:%.*]], i32 [[C:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 [[A:%.*]])
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MIN_BC:%.*]] = call i32 @llvm.smin.i32(i32 [[B:%.*]], i32 [[C:%.*]])
+; CHECK-NEXT: [[MIN_ABC:%.*]] = call i32 @llvm.smin.i32(i32 [[MIN_BC]], i32 [[A:%.*]])
+; CHECK-NEXT: ret i32 [[MIN_ABC]]
;
%cmp_ab = icmp slt i32 %a, %b
%min_ab = select i1 %cmp_ab, i32 %a, i32 %b
define <2 x i32> @common_factor_smax(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
; CHECK-LABEL: @common_factor_smax(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[C:%.*]], <2 x i32> [[B:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[A:%.*]])
-; CHECK-NEXT: ret <2 x i32> [[TMP2]]
+; CHECK-NEXT: [[MAX_CB:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[C:%.*]], <2 x i32> [[B:%.*]])
+; CHECK-NEXT: [[MAX_ABC:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[MAX_CB]], <2 x i32> [[A:%.*]])
+; CHECK-NEXT: ret <2 x i32> [[MAX_ABC]]
;
%cmp_ab = icmp sgt <2 x i32> %a, %b
%max_ab = select <2 x i1> %cmp_ab, <2 x i32> %a, <2 x i32> %b
define <2 x i32> @common_factor_umin(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
; CHECK-LABEL: @common_factor_umin(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[C:%.*]])
-; CHECK-NEXT: ret <2 x i32> [[TMP2]]
+; CHECK-NEXT: [[MIN_AB:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]])
+; CHECK-NEXT: [[MIN_ABC:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[MIN_AB]], <2 x i32> [[C:%.*]])
+; CHECK-NEXT: ret <2 x i32> [[MIN_ABC]]
;
%cmp_bc = icmp ult <2 x i32> %b, %c
%min_bc = select <2 x i1> %cmp_bc, <2 x i32> %b, <2 x i32> %c
define i32 @common_factor_umax(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_umax(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 [[C:%.*]])
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MAX_BA:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[A:%.*]])
+; CHECK-NEXT: [[MAX_ABC:%.*]] = call i32 @llvm.umax.i32(i32 [[MAX_BA]], i32 [[C:%.*]])
+; CHECK-NEXT: ret i32 [[MAX_ABC]]
;
%cmp_bc = icmp ugt i32 %b, %c
%max_bc = select i1 %cmp_bc, i32 %b, i32 %c
define i32 @common_factor_umax_extra_use_lhs(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_umax_extra_use_lhs(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[C:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 [[A:%.*]])
-; CHECK-NEXT: call void @extra_use(i32 [[TMP1]])
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MAX_BC:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[C:%.*]])
+; CHECK-NEXT: [[MAX_ABC:%.*]] = call i32 @llvm.umax.i32(i32 [[MAX_BC]], i32 [[A:%.*]])
+; CHECK-NEXT: call void @extra_use(i32 [[MAX_BC]])
+; CHECK-NEXT: ret i32 [[MAX_ABC]]
;
%cmp_bc = icmp ugt i32 %b, %c
%max_bc = select i1 %cmp_bc, i32 %b, i32 %c
define i32 @common_factor_umax_extra_use_rhs(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_umax_extra_use_rhs(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 [[C:%.*]])
-; CHECK-NEXT: call void @extra_use(i32 [[TMP1]])
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[MAX_BA:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[A:%.*]])
+; CHECK-NEXT: [[MAX_ABC:%.*]] = call i32 @llvm.umax.i32(i32 [[MAX_BA]], i32 [[C:%.*]])
+; CHECK-NEXT: call void @extra_use(i32 [[MAX_BA]])
+; CHECK-NEXT: ret i32 [[MAX_ABC]]
;
%cmp_bc = icmp ugt i32 %b, %c
%max_bc = select i1 %cmp_bc, i32 %b, i32 %c
define i32 @common_factor_umax_extra_use_both(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_umax_extra_use_both(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[C:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[B]], i32 [[A:%.*]])
-; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 [[TMP2]])
-; CHECK-NEXT: call void @extra_use(i32 [[TMP1]])
-; CHECK-NEXT: call void @extra_use(i32 [[TMP2]])
-; CHECK-NEXT: ret i32 [[TMP3]]
+; CHECK-NEXT: [[MAX_BC:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[C:%.*]])
+; CHECK-NEXT: [[MAX_BA:%.*]] = call i32 @llvm.umax.i32(i32 [[B]], i32 [[A:%.*]])
+; CHECK-NEXT: [[MAX_ABC:%.*]] = call i32 @llvm.umax.i32(i32 [[MAX_BC]], i32 [[MAX_BA]])
+; CHECK-NEXT: call void @extra_use(i32 [[MAX_BC]])
+; CHECK-NEXT: call void @extra_use(i32 [[MAX_BA]])
+; CHECK-NEXT: ret i32 [[MAX_ABC]]
;
%cmp_bc = icmp ugt i32 %b, %c
%max_bc = select i1 %cmp_bc, i32 %b, i32 %c
define float @not_min_of_min(i8 %i, float %x) {
; CHECK-LABEL: @not_min_of_min(
; CHECK-NEXT: [[CMP1_INV:%.*]] = fcmp fast oge float [[X:%.*]], 1.000000e+00
-; CHECK-NEXT: [[TMP1:%.*]] = select fast i1 [[CMP1_INV]], float 1.000000e+00, float [[X]]
+; CHECK-NEXT: [[MIN1:%.*]] = select fast i1 [[CMP1_INV]], float 1.000000e+00, float [[X]]
; CHECK-NEXT: [[CMP2_INV:%.*]] = fcmp fast oge float [[X]], 2.000000e+00
-; CHECK-NEXT: [[TMP2:%.*]] = select fast i1 [[CMP2_INV]], float 2.000000e+00, float [[X]]
+; CHECK-NEXT: [[MIN2:%.*]] = select fast i1 [[CMP2_INV]], float 2.000000e+00, float [[X]]
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i8 [[I:%.*]], 16
-; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP3]], float [[TMP1]], float [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP3]], float [[MIN1]], float [[MIN2]]
; CHECK-NEXT: ret float [[R]]
;
%cmp1 = fcmp fast ult float %x, 1.0
define i32 @add_umin(i32 %x) {
; CHECK-LABEL: @add_umin(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 27)
-; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i32 [[TMP1]], 15
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[TMP1]], 15
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nuw i32 %x, 15
%c = icmp ult i32 %a, 42
define i32 @add_umin_constant_limit(i32 %x) {
; CHECK-LABEL: @add_umin_constant_limit(
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[DOTNOT]], i32 41, i32 42
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[DOTNOT]], i32 41, i32 42
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nuw i32 %x, 41
%c = icmp ult i32 %a, 42
define i32 @add_umin_wrong_pred(i32 %x) {
; CHECK-LABEL: @add_umin_wrong_pred(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nuw i32 %x, 15
%c = icmp slt i32 %a, 42
define i32 @add_umin_wrong_wrap(i32 %x) {
; CHECK-LABEL: @add_umin_wrong_wrap(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw i32 %x, 15
%c = icmp ult i32 %a, 42
; CHECK-LABEL: @add_umin_extra_use(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
; CHECK-NEXT: store i32 [[A]], ptr [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nuw i32 %x, 15
store i32 %a, ptr %p
define <2 x i16> @add_umin_vec(<2 x i16> %x) {
; CHECK-LABEL: @add_umin_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.umin.v2i16(<2 x i16> [[X:%.*]], <2 x i16> <i16 225, i16 225>)
-; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw <2 x i16> [[TMP1]], <i16 15, i16 15>
-; CHECK-NEXT: ret <2 x i16> [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw <2 x i16> [[TMP1]], <i16 15, i16 15>
+; CHECK-NEXT: ret <2 x i16> [[R]]
;
%a = add nuw <2 x i16> %x, <i16 15, i16 15>
%c = icmp ult <2 x i16> %a, <i16 240, i16 240>
define i37 @add_umax(i37 %x) {
; CHECK-LABEL: @add_umax(
; CHECK-NEXT: [[TMP1:%.*]] = call i37 @llvm.umax.i37(i37 [[X:%.*]], i37 37)
-; CHECK-NEXT: [[TMP2:%.*]] = add nuw i37 [[TMP1]], 5
-; CHECK-NEXT: ret i37 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nuw i37 [[TMP1]], 5
+; CHECK-NEXT: ret i37 [[R]]
;
%a = add nuw i37 %x, 5
%c = icmp ugt i37 %a, 42
define i37 @add_umax_constant_limit(i37 %x) {
; CHECK-LABEL: @add_umax_constant_limit(
; CHECK-NEXT: [[TMP1:%.*]] = call i37 @llvm.umax.i37(i37 [[X:%.*]], i37 1)
-; CHECK-NEXT: [[TMP2:%.*]] = add nuw i37 [[TMP1]], 81
-; CHECK-NEXT: ret i37 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nuw i37 [[TMP1]], 81
+; CHECK-NEXT: ret i37 [[R]]
;
%a = add nuw i37 %x, 81
%c = icmp ugt i37 %a, 82
define i32 @add_umax_wrong_pred(i32 %x) {
; CHECK-LABEL: @add_umax_wrong_pred(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nuw i32 %x, 15
%c = icmp sgt i32 %a, 42
define i32 @add_umax_wrong_wrap(i32 %x) {
; CHECK-LABEL: @add_umax_wrong_wrap(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw i32 %x, 15
%c = icmp ugt i32 %a, 42
; CHECK-LABEL: @add_umax_extra_use(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
; CHECK-NEXT: store i32 [[A]], ptr [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nuw i32 %x, 15
store i32 %a, ptr %p
define <2 x i33> @add_umax_vec(<2 x i33> %x) {
; CHECK-LABEL: @add_umax_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i33> @llvm.umax.v2i33(<2 x i33> [[X:%.*]], <2 x i33> <i33 235, i33 235>)
-; CHECK-NEXT: [[TMP2:%.*]] = add nuw <2 x i33> [[TMP1]], <i33 5, i33 5>
-; CHECK-NEXT: ret <2 x i33> [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nuw <2 x i33> [[TMP1]], <i33 5, i33 5>
+; CHECK-NEXT: ret <2 x i33> [[R]]
;
%a = add nuw <2 x i33> %x, <i33 5, i33 5>
%c = icmp ugt <2 x i33> %a, <i33 240, i33 240>
define i8 @PR14613_umax(i8 %x) {
; CHECK-LABEL: @PR14613_umax(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[X:%.*]], i8 -16)
-; CHECK-NEXT: [[TMP2:%.*]] = add nsw i8 [[TMP1]], 15
-; CHECK-NEXT: ret i8 [[TMP2]]
+; CHECK-NEXT: [[U7:%.*]] = add nsw i8 [[TMP1]], 15
+; CHECK-NEXT: ret i8 [[U7]]
;
%u4 = zext i8 %x to i32
%u5 = add nuw nsw i32 %u4, 15
define i32 @add_smin(i32 %x) {
; CHECK-LABEL: @add_smin(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 27)
-; CHECK-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], 15
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[TMP1]], 15
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw i32 %x, 15
%c = icmp slt i32 %a, 42
define i32 @add_smin_constant_limit(i32 %x) {
; CHECK-LABEL: @add_smin_constant_limit(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 2147483646)
-; CHECK-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], -3
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[TMP1]], -3
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw i32 %x, -3
%c = icmp slt i32 %a, 2147483643
define i32 @add_smin_wrong_pred(i32 %x) {
; CHECK-LABEL: @add_smin_wrong_pred(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw i32 %x, 15
%c = icmp ult i32 %a, 42
define i32 @add_smin_wrong_wrap(i32 %x) {
; CHECK-LABEL: @add_smin_wrong_wrap(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nuw i32 %x, 15
%c = icmp slt i32 %a, 42
; CHECK-LABEL: @add_smin_extra_use(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
; CHECK-NEXT: store i32 [[A]], ptr [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw i32 %x, 15
store i32 %a, ptr %p
define <2 x i16> @add_smin_vec(<2 x i16> %x) {
; CHECK-LABEL: @add_smin_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.smin.v2i16(<2 x i16> [[X:%.*]], <2 x i16> <i16 225, i16 225>)
-; CHECK-NEXT: [[TMP2:%.*]] = add nsw <2 x i16> [[TMP1]], <i16 15, i16 15>
-; CHECK-NEXT: ret <2 x i16> [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nsw <2 x i16> [[TMP1]], <i16 15, i16 15>
+; CHECK-NEXT: ret <2 x i16> [[R]]
;
%a = add nsw <2 x i16> %x, <i16 15, i16 15>
%c = icmp slt <2 x i16> %a, <i16 240, i16 240>
define i37 @add_smax(i37 %x) {
; CHECK-LABEL: @add_smax(
; CHECK-NEXT: [[TMP1:%.*]] = call i37 @llvm.smax.i37(i37 [[X:%.*]], i37 37)
-; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i37 [[TMP1]], 5
-; CHECK-NEXT: ret i37 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw i37 [[TMP1]], 5
+; CHECK-NEXT: ret i37 [[R]]
;
%a = add nsw i37 %x, 5
%c = icmp sgt i37 %a, 42
define i8 @add_smax_constant_limit(i8 %x) {
; CHECK-LABEL: @add_smax_constant_limit(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X:%.*]], i8 -127)
-; CHECK-NEXT: [[TMP2:%.*]] = add nsw i8 [[TMP1]], 125
-; CHECK-NEXT: ret i8 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nsw i8 [[TMP1]], 125
+; CHECK-NEXT: ret i8 [[R]]
;
%a = add nsw i8 %x, 125
%c = icmp sgt i8 %a, -2
define i32 @add_smax_wrong_pred(i32 %x) {
; CHECK-LABEL: @add_smax_wrong_pred(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw i32 %x, 15
%c = icmp ugt i32 %a, 42
define i32 @add_smax_wrong_wrap(i32 %x) {
; CHECK-LABEL: @add_smax_wrong_wrap(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nuw i32 %x, 15
%c = icmp sgt i32 %a, 42
; CHECK-LABEL: @add_smax_extra_use(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
; CHECK-NEXT: store i32 [[A]], ptr [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 42)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw i32 %x, 15
store i32 %a, ptr %p
define <2 x i33> @add_smax_vec(<2 x i33> %x) {
; CHECK-LABEL: @add_smax_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i33> @llvm.smax.v2i33(<2 x i33> [[X:%.*]], <2 x i33> <i33 235, i33 235>)
-; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw <2 x i33> [[TMP1]], <i33 5, i33 5>
-; CHECK-NEXT: ret <2 x i33> [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw <2 x i33> [[TMP1]], <i33 5, i33 5>
+; CHECK-NEXT: ret <2 x i33> [[R]]
;
%a = add nsw <2 x i33> %x, <i33 5, i33 5>
%c = icmp sgt <2 x i33> %a, <i33 240, i33 240>
; CHECK-LABEL: @twoway_clamp_lt(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i32 [[NUM:%.*]], 13767
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i32 13768, i32 13767
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP0]], i32 13768, i32 13767
+; CHECK-NEXT: ret i32 [[R]]
;
entry:
%cmp1 = icmp slt i32 %num, 13768
define i32 @twoway_clamp_gt(i32 %num) {
; CHECK-LABEL: @twoway_clamp_gt(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smax.i32(i32 [[NUM:%.*]], i32 13767)
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 13768)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[S1:%.*]] = call i32 @llvm.smax.i32(i32 [[NUM:%.*]], i32 13767)
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umin.i32(i32 [[S1]], i32 13768)
+; CHECK-NEXT: ret i32 [[R]]
;
entry:
%cmp1 = icmp sgt i32 %num, 13767
; CHECK-LABEL: @twoway_clamp_gt_nonconst(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[K1:%.*]] = add i32 [[K:%.*]], 1
-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smax.i32(i32 [[NUM:%.*]], i32 [[K]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP0]], i32 [[K1]])
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[S1:%.*]] = call i32 @llvm.smax.i32(i32 [[NUM:%.*]], i32 [[K]])
+; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smin.i32(i32 [[S1]], i32 [[K1]])
+; CHECK-NEXT: ret i32 [[R]]
;
entry:
%k1 = add i32 %k, 1