arm64: dts: qcom: sc7280: Add venus DT node

Add DT entries for the sc7280 venus encoder/decoder.

Co-developed-by: Mansur Alisha Shaik <mansur@codeaurora.org>
Signed-off-by: Mansur Alisha Shaik <mansur@codeaurora.org>
Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1635259922-25378-1-git-send-email-quic_dikshita@quicinc.com

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 365a2e0..e4988ea 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -129,6 +129,11 @@
                        no-map;
                };
 
+               video_mem: memory@8b200000 {
+                       reg = <0x0 0x8b200000 0x0 0x500000>;
+                       no-map;
+               };
+
                ipa_fw_mem: memory@8b700000 {
                        reg = <0 0x8b700000 0 0x10000>;
                        no-map;
@@ -2675,6 +2680,76 @@
                        };
                };
 
+               venus: video-codec@aa00000 {
+                       compatible = "qcom,sc7280-venus";
+                       reg = <0 0x0aa00000 0 0xd0600>;
+                       interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+
+                       clocks = <&videocc VIDEO_CC_MVSC_CORE_CLK>,
+                                <&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>,
+                                <&videocc VIDEO_CC_VENUS_AHB_CLK>,
+                                <&videocc VIDEO_CC_MVS0_CORE_CLK>,
+                                <&videocc VIDEO_CC_MVS0_AXI_CLK>;
+                       clock-names = "core", "bus", "iface",
+                                     "vcodec_core", "vcodec_bus";
+
+                       power-domains = <&videocc MVSC_GDSC>,
+                                       <&videocc MVS0_GDSC>,
+                                       <&rpmhpd SC7280_CX>;
+                       power-domain-names = "venus", "vcodec0", "cx";
+                       operating-points-v2 = <&venus_opp_table>;
+
+                       interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>,
+                                       <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
+                       interconnect-names = "cpu-cfg", "video-mem";
+
+                       iommus = <&apps_smmu 0x2180 0x20>,
+                                <&apps_smmu 0x2184 0x20>;
+                       memory-region = <&video_mem>;
+
+                       video-decoder {
+                               compatible = "venus-decoder";
+                       };
+
+                       video-encoder {
+                               compatible = "venus-encoder";
+                       };
+
+                       video-firmware {
+                               iommus = <&apps_smmu 0x21a2 0x0>;
+                       };
+
+                       venus_opp_table: venus-opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-133330000 {
+                                       opp-hz = /bits/ 64 <133330000>;
+                                       required-opps = <&rpmhpd_opp_low_svs>;
+                               };
+
+                               opp-240000000 {
+                                       opp-hz = /bits/ 64 <240000000>;
+                                       required-opps = <&rpmhpd_opp_svs>;
+                               };
+
+                               opp-335000000 {
+                                       opp-hz = /bits/ 64 <335000000>;
+                                       required-opps = <&rpmhpd_opp_svs_l1>;
+                               };
+
+                               opp-424000000 {
+                                       opp-hz = /bits/ 64 <424000000>;
+                                       required-opps = <&rpmhpd_opp_nom>;
+                               };
+
+                               opp-460000048 {
+                                       opp-hz = /bits/ 64 <460000048>;
+                                       required-opps = <&rpmhpd_opp_turbo>;
+                               };
+                       };
+
+               };
+
                videocc: clock-controller@aaf0000 {
                        compatible = "qcom,sc7280-videocc";
                        reg = <0 0xaaf0000 0 0x10000>;