earlycon: Let users set the clock frequency
authorRicardo Ribalda <ribalda@chromium.org>
Thu, 24 Nov 2022 12:39:07 +0000 (13:39 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 19 Jan 2023 13:56:44 +0000 (14:56 +0100)
Some platforms, namely AMD Picasso, use non standard uart clocks (48M),
witch makes it impossible to use with earlycon.

Let the user select its own frequency.

Signed-off-by: Ricardo Ribalda <ribalda@chromium.org>
Reviewed-by: Jiri Slaby <jirislaby@kernel.org>
Link: https://lore.kernel.org/r/20221123-serial-clk-v3-1-49c516980ae0@chromium.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/admin-guide/kernel-parameters.txt
drivers/tty/serial/earlycon.c

index 6cfa6e3..b50bdee 100644 (file)
                        specified, the serial port must already be setup and
                        configured.
 
-               uart[8250],io,<addr>[,options]
-               uart[8250],mmio,<addr>[,options]
-               uart[8250],mmio32,<addr>[,options]
-               uart[8250],mmio32be,<addr>[,options]
+               uart[8250],io,<addr>[,options[,uartclk]]
+               uart[8250],mmio,<addr>[,options[,uartclk]]
+               uart[8250],mmio32,<addr>[,options[,uartclk]]
+               uart[8250],mmio32be,<addr>[,options[,uartclk]]
                uart[8250],0x<addr>[,options]
                        Start an early, polled-mode console on the 8250/16550
                        UART at the specified I/O port or MMIO address.
                        If none of [io|mmio|mmio32|mmio32be], <addr> is assumed
                        to be equivalent to 'mmio'. 'options' are specified
                        in the same format described for "console=ttyS<n>"; if
-                       unspecified, the h/w is not initialized.
+                       unspecified, the h/w is not initialized. 'uartclk' is
+                       the uart clock frequency; if unspecified, it is set
+                       to 'BASE_BAUD' * 16.
 
                pl011,<addr>
                pl011,mmio32,<addr>
index 4f6e9bf..a5fbb6e 100644 (file)
@@ -120,7 +120,13 @@ static int __init parse_options(struct earlycon_device *device, char *options)
        }
 
        if (options) {
+               char *uartclk;
+
                device->baud = simple_strtoul(options, NULL, 0);
+               uartclk = strchr(options, ',');
+               if (uartclk && kstrtouint(uartclk + 1, 0, &port->uartclk) < 0)
+                       pr_warn("[%s] unsupported earlycon uart clkrate option\n",
+                               options);
                length = min(strcspn(options, " ") + 1,
                             (size_t)(sizeof(device->options)));
                strscpy(device->options, options, length);
@@ -139,7 +145,8 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match)
                buf = NULL;
 
        spin_lock_init(&port->lock);
-       port->uartclk = BASE_BAUD * 16;
+       if (!port->uartclk)
+               port->uartclk = BASE_BAUD * 16;
        if (port->mapbase)
                port->membase = earlycon_map(port->mapbase, 64);