drm/amd/powerplay: update soc boot and max level on vega10
authorKenneth Feng <kenneth.feng@amd.com>
Sat, 2 Feb 2019 07:01:53 +0000 (15:01 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Feb 2019 02:15:32 +0000 (21:15 -0500)
update soc boot and max level,then uclk isn't stuck
at minimum.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=109462
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

index 0d38ac2..5479125 100644 (file)
@@ -3579,6 +3579,10 @@ static int vega10_generate_dpm_level_enable_mask(
                        vega10_find_lowest_dpm_level(&(data->dpm_table.mem_table));
        data->smc_state_table.mem_max_level =
                        vega10_find_highest_dpm_level(&(data->dpm_table.mem_table));
+       data->smc_state_table.soc_boot_level =
+                       vega10_find_lowest_dpm_level(&(data->dpm_table.soc_table));
+       data->smc_state_table.soc_max_level =
+                       vega10_find_highest_dpm_level(&(data->dpm_table.soc_table));
 
        PP_ASSERT_WITH_CODE(!vega10_upload_dpm_bootup_level(hwmgr),
                        "Attempt to upload DPM Bootup Levels Failed!",
@@ -3593,6 +3597,9 @@ static int vega10_generate_dpm_level_enable_mask(
        for(i = data->smc_state_table.mem_boot_level; i < data->smc_state_table.mem_max_level; i++)
                data->dpm_table.mem_table.dpm_levels[i].enabled = true;
 
+       for (i = data->smc_state_table.soc_boot_level; i < data->smc_state_table.soc_max_level; i++)
+               data->dpm_table.soc_table.dpm_levels[i].enabled = true;
+
        return 0;
 }