radeonsi: clarify the MSAA resolve limitation with scanout
authorMarek Olšák <marek.olsak@amd.com>
Wed, 8 Jun 2016 18:51:50 +0000 (20:51 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 14 Jun 2016 18:22:16 +0000 (20:22 +0200)
this is the correct hw requirement

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeonsi/si_blit.c

index 68d9799..9de2c75 100644 (file)
@@ -859,6 +859,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
                                     const struct pipe_blit_info *info)
 {
        struct si_context *sctx = (struct si_context*)ctx;
+       struct r600_texture *src = (struct r600_texture*)info->src.resource;
        struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
        unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
        unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
@@ -902,7 +903,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
            info->src.box.height == dst_height &&
            info->src.box.depth == 1 &&
            dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
-           !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
+           src->surface.micro_tile_mode == dst->surface.micro_tile_mode &&
            (!dst->cmask.size || !dst->dirty_level_mask)) { /* dst cannot be fast-cleared */
                /* Resolving into a surface with DCC is unsupported. Since
                 * it's being overwritten anyway, clear it to uncompressed.
@@ -946,6 +947,9 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
        if (!tmp)
                return false;
 
+       assert(src->surface.micro_tile_mode ==
+              ((struct r600_texture*)tmp)->surface.micro_tile_mode);
+
        /* resolve */
        si_blitter_begin(ctx, SI_COLOR_RESOLVE |
                         (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));