* gas/i860/bitwise.{s,d}: New files.
* gas/i860/bte.{s,d}: New files.
* gas/i860/fldst01.{s,d}: New files.
* gas/i860/fldst02.{s,d}: New files.
* gas/i860/fldst03.{s,d}: New files.
* gas/i860/fldst04.{s,d}: New files.
* gas/i860/fldst05.{s,d}: New files.
* gas/i860/fldst06.{s,d}: New files.
* gas/i860/fldst07.{s,d}: New files.
* gas/i860/fldst08.{s,d}: New files.
* gas/i860/float01.{s,d}: New files.
* gas/i860/float02.{s,d}: New files.
* gas/i860/float03.{s,d}: New files.
* gas/i860/float04.{s,d}: New files.
* gas/i860/form.{s,d}: New files.
* gas/i860/iarith.{s,d}: New files.
* gas/i860/ldst01.{s,d}: New files.
* gas/i860/ldst02.{s,d}: New files.
* gas/i860/ldst03.{s,d}: New files.
* gas/i860/ldst04.{s,d}: New files.
* gas/i860/ldst05.{s,d}: New files.
* gas/i860/ldst06.{s,d}: New files.
* gas/i860/pfam.{s,d}: New files.
* gas/i860/pfmam.{s,d}: New files.
* gas/i860/pfmsm.{s,d}: New files.
* gas/i860/pfsm.{s,d}: New files.
* gas/i860/regress01.{s,d}: New files.
* gas/i860/shift.{s,d}: New files.
* gas/i860/simd.{s,d}: New files.
2003-05-20 Jason Eckhardt <jle@rice.edu>
+ * gas/i860/bitwise.{s,d}: New files.
+ * gas/i860/bte.{s,d}: New files.
+ * gas/i860/fldst01.{s,d}: New files.
+ * gas/i860/fldst02.{s,d}: New files.
+ * gas/i860/fldst03.{s,d}: New files.
+ * gas/i860/fldst04.{s,d}: New files.
+ * gas/i860/fldst05.{s,d}: New files.
+ * gas/i860/fldst06.{s,d}: New files.
+ * gas/i860/fldst07.{s,d}: New files.
+ * gas/i860/fldst08.{s,d}: New files.
+ * gas/i860/float01.{s,d}: New files.
+ * gas/i860/float02.{s,d}: New files.
+ * gas/i860/float03.{s,d}: New files.
+ * gas/i860/float04.{s,d}: New files.
+ * gas/i860/form.{s,d}: New files.
+ * gas/i860/iarith.{s,d}: New files.
+ * gas/i860/ldst01.{s,d}: New files.
+ * gas/i860/ldst02.{s,d}: New files.
+ * gas/i860/ldst03.{s,d}: New files.
+ * gas/i860/ldst04.{s,d}: New files.
+ * gas/i860/ldst05.{s,d}: New files.
+ * gas/i860/ldst06.{s,d}: New files.
+ * gas/i860/pfam.{s,d}: New files.
+ * gas/i860/pfmam.{s,d}: New files.
+ * gas/i860/pfmsm.{s,d}: New files.
+ * gas/i860/pfsm.{s,d}: New files.
+ * gas/i860/regress01.{s,d}: New files.
+ * gas/i860/shift.{s,d}: New files.
+ * gas/i860/simd.{s,d}: New files.
+
+2003-05-20 Jason Eckhardt <jle@rice.edu>
+
* gas/i860: New directory.
* gas/i860/i860.exp: New file.
--- /dev/null
+#as:
+#objdump: -dr
+#name: bitwise
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 22 c0 and %r0,%r1,%sp
+ 4: 00 18 85 c0 and %fp,%r4,%r5
+ 8: 00 30 e8 c0 and %r6,%r7,%r8
+ c: 00 48 4b c1 and %r9,%r10,%r11
+ 10: 00 60 ae c1 and %r12,%r13,%r14
+ 14: 00 78 11 c2 and %r15,%r16,%r17
+ 18: 00 90 74 c2 and %r18,%r19,%r20
+ 1c: 00 a8 d7 c2 and %r21,%r22,%r23
+ 20: 00 c0 3a c3 and %r24,%r25,%r26
+ 24: 00 d8 9d c3 and %r27,%r28,%r29
+ 28: 00 f0 e0 c3 and %r30,%r31,%r0
+ 2c: 00 00 22 d0 andnot %r0,%r1,%sp
+ 30: 00 18 85 d0 andnot %fp,%r4,%r5
+ 34: 00 30 e8 d0 andnot %r6,%r7,%r8
+ 38: 00 48 4b d1 andnot %r9,%r10,%r11
+ 3c: 00 60 ae d1 andnot %r12,%r13,%r14
+ 40: 00 78 11 d2 andnot %r15,%r16,%r17
+ 44: 00 90 74 d2 andnot %r18,%r19,%r20
+ 48: 00 a8 d7 d2 andnot %r21,%r22,%r23
+ 4c: 00 c0 3a d3 andnot %r24,%r25,%r26
+ 50: 00 d8 9d d3 andnot %r27,%r28,%r29
+ 54: 00 f0 e0 d3 andnot %r30,%r31,%r0
+ 58: 00 00 22 e0 or %r0,%r1,%sp
+ 5c: 00 18 85 e0 or %fp,%r4,%r5
+ 60: 00 30 e8 e0 or %r6,%r7,%r8
+ 64: 00 48 4b e1 or %r9,%r10,%r11
+ 68: 00 60 ae e1 or %r12,%r13,%r14
+ 6c: 00 78 11 e2 or %r15,%r16,%r17
+ 70: 00 90 74 e2 or %r18,%r19,%r20
+ 74: 00 a8 d7 e2 or %r21,%r22,%r23
+ 78: 00 c0 3a e3 or %r24,%r25,%r26
+ 7c: 00 d8 9d e3 or %r27,%r28,%r29
+ 80: 00 f0 e0 e3 or %r30,%r31,%r0
+ 84: 00 00 22 f0 xor %r0,%r1,%sp
+ 88: 00 18 85 f0 xor %fp,%r4,%r5
+ 8c: 00 30 e8 f0 xor %r6,%r7,%r8
+ 90: 00 48 4b f1 xor %r9,%r10,%r11
+ 94: 00 60 ae f1 xor %r12,%r13,%r14
+ 98: 00 78 11 f2 xor %r15,%r16,%r17
+ 9c: 00 90 74 f2 xor %r18,%r19,%r20
+ a0: 00 a8 d7 f2 xor %r21,%r22,%r23
+ a4: 00 c0 3a f3 xor %r24,%r25,%r26
+ a8: 00 d8 9d f3 xor %r27,%r28,%r29
+ ac: 00 f0 e0 f3 xor %r30,%r31,%r0
+ b0: 00 00 22 c4 and 0x0000,%r1,%sp
+ b4: 00 20 85 c4 and 0x2000,%r4,%r5
+ b8: f5 13 e8 c4 and 0x13f5,%r7,%r8
+ bc: 00 80 4b c5 and 0x8000,%r10,%r11
+ c0: e8 fd ae c5 and 0xfde8,%r13,%r14
+ c4: ff ff 11 c6 and 0xffff,%r16,%r17
+ c8: ff ff 74 c6 and 0xffff,%r19,%r20
+ cc: cd ab d7 c6 and 0xabcd,%r22,%r23
+ d0: 34 12 3a c7 and 0x1234,%r25,%r26
+ d4: 00 00 9d c7 and 0x0000,%r28,%r29
+ d8: 03 00 e0 c7 and 0x0003,%r31,%r0
+ dc: 01 00 22 cc andh 0x0001,%r1,%sp
+ e0: 01 20 85 cc andh 0x2001,%r4,%r5
+ e4: f6 13 e8 cc andh 0x13f6,%r7,%r8
+ e8: 01 80 4b cd andh 0x8001,%r10,%r11
+ ec: e9 fd ae cd andh 0xfde9,%r13,%r14
+ f0: ff ff 11 ce andh 0xffff,%r16,%r17
+ f4: ff ff 74 ce andh 0xffff,%r19,%r20
+ f8: cd ab d7 ce andh 0xabcd,%r22,%r23
+ fc: 34 12 3a cf andh 0x1234,%r25,%r26
+ 100: 00 00 9d cf andh 0x0000,%r28,%r29
+ 104: 03 00 e0 cf andh 0x0003,%r31,%r0
+ 108: 00 00 22 d4 andnot 0x0000,%r1,%sp
+ 10c: 00 20 85 d4 andnot 0x2000,%r4,%r5
+ 110: f5 13 e8 d4 andnot 0x13f5,%r7,%r8
+ 114: 00 80 4b d5 andnot 0x8000,%r10,%r11
+ 118: e8 fd ae d5 andnot 0xfde8,%r13,%r14
+ 11c: ff ff 11 d6 andnot 0xffff,%r16,%r17
+ 120: ff ff 74 d6 andnot 0xffff,%r19,%r20
+ 124: cd ab d7 d6 andnot 0xabcd,%r22,%r23
+ 128: 34 12 3a d7 andnot 0x1234,%r25,%r26
+ 12c: 00 00 9d d7 andnot 0x0000,%r28,%r29
+ 130: 03 00 e0 d7 andnot 0x0003,%r31,%r0
+ 134: 01 00 22 dc andnoth 0x0001,%r1,%sp
+ 138: 01 20 85 dc andnoth 0x2001,%r4,%r5
+ 13c: f6 13 e8 dc andnoth 0x13f6,%r7,%r8
+ 140: 01 80 4b dd andnoth 0x8001,%r10,%r11
+ 144: e9 fd ae dd andnoth 0xfde9,%r13,%r14
+ 148: ff ff 11 de andnoth 0xffff,%r16,%r17
+ 14c: ff ff 74 de andnoth 0xffff,%r19,%r20
+ 150: cd ab d7 de andnoth 0xabcd,%r22,%r23
+ 154: 34 12 3a df andnoth 0x1234,%r25,%r26
+ 158: 00 00 9d df andnoth 0x0000,%r28,%r29
+ 15c: 03 00 e0 df andnoth 0x0003,%r31,%r0
+ 160: 00 00 22 e4 or 0x0000,%r1,%sp
+ 164: 01 00 85 e4 or 0x0001,%r4,%r5
+ 168: 02 00 e8 e4 or 0x0002,%r7,%r8
+ 16c: 03 00 4b e5 or 0x0003,%r10,%r11
+ 170: e8 fd ae e5 or 0xfde8,%r13,%r14
+ 174: ff ff 11 e6 or 0xffff,%r16,%r17
+ 178: ff ff 74 e6 or 0xffff,%r19,%r20
+ 17c: cd ab d7 e6 or 0xabcd,%r22,%r23
+ 180: 34 12 3a e7 or 0x1234,%r25,%r26
+ 184: 00 00 9d e7 or 0x0000,%r28,%r29
+ 188: 03 00 e0 e7 or 0x0003,%r31,%r0
+ 18c: 00 00 22 ec orh 0x0000,%r1,%sp
+ 190: 01 00 85 ec orh 0x0001,%r4,%r5
+ 194: 02 00 e8 ec orh 0x0002,%r7,%r8
+ 198: 03 00 4b ed orh 0x0003,%r10,%r11
+ 19c: e8 fd ae ed orh 0xfde8,%r13,%r14
+ 1a0: ff ff 11 ee orh 0xffff,%r16,%r17
+ 1a4: ff ff 74 ee orh 0xffff,%r19,%r20
+ 1a8: cd ab d7 ee orh 0xabcd,%r22,%r23
+ 1ac: 34 12 3a ef orh 0x1234,%r25,%r26
+ 1b0: 00 00 9d ef orh 0x0000,%r28,%r29
+ 1b4: 03 00 e0 ef orh 0x0003,%r31,%r0
+ 1b8: 00 00 22 f4 xor 0x0000,%r1,%sp
+ 1bc: 01 00 85 f4 xor 0x0001,%r4,%r5
+ 1c0: 02 00 e8 f4 xor 0x0002,%r7,%r8
+ 1c4: 03 00 4b f5 xor 0x0003,%r10,%r11
+ 1c8: e8 fd ae f5 xor 0xfde8,%r13,%r14
+ 1cc: ff ff 11 f6 xor 0xffff,%r16,%r17
+ 1d0: ff ff 74 f6 xor 0xffff,%r19,%r20
+ 1d4: cd ab d7 f6 xor 0xabcd,%r22,%r23
+ 1d8: 34 12 3a f7 xor 0x1234,%r25,%r26
+ 1dc: 00 00 9d f7 xor 0x0000,%r28,%r29
+ 1e0: 03 00 e0 f7 xor 0x0003,%r31,%r0
+ 1e4: 00 00 22 fc xorh 0x0000,%r1,%sp
+ 1e8: 01 00 85 fc xorh 0x0001,%r4,%r5
+ 1ec: 02 00 e8 fc xorh 0x0002,%r7,%r8
+ 1f0: 03 00 4b fd xorh 0x0003,%r10,%r11
+ 1f4: e8 fd ae fd xorh 0xfde8,%r13,%r14
+ 1f8: ff ff 11 fe xorh 0xffff,%r16,%r17
+ 1fc: ff ff 74 fe xorh 0xffff,%r19,%r20
+ 200: cd ab d7 fe xorh 0xabcd,%r22,%r23
+ 204: 34 12 3a ff xorh 0x1234,%r25,%r26
+ 208: 00 00 9d ff xorh 0x0000,%r28,%r29
+ 20c: 03 00 e0 ff xorh 0x0003,%r31,%r0
--- /dev/null
+# and, andh, andnot, andnoth, or, orh, xor, xorh
+
+ .text
+
+ # Register forms (high variants do not have register forms).
+ and %r0,%r1,%r2
+ and %r3,%r4,%r5
+ and %r6,%r7,%r8
+ and %r9,%r10,%r11
+ and %r12,%r13,%r14
+ and %r15,%r16,%r17
+ and %r18,%r19,%r20
+ and %r21,%r22,%r23
+ and %r24,%r25,%r26
+ and %r27,%r28,%r29
+ and %r30,%r31,%r0
+
+ andnot %r0,%r1,%r2
+ andnot %r3,%r4,%r5
+ andnot %r6,%r7,%r8
+ andnot %r9,%r10,%r11
+ andnot %r12,%r13,%r14
+ andnot %r15,%r16,%r17
+ andnot %r18,%r19,%r20
+ andnot %r21,%r22,%r23
+ andnot %r24,%r25,%r26
+ andnot %r27,%r28,%r29
+ andnot %r30,%r31,%r0
+
+ or %r0,%r1,%r2
+ or %r3,%r4,%r5
+ or %r6,%r7,%r8
+ or %r9,%r10,%r11
+ or %r12,%r13,%r14
+ or %r15,%r16,%r17
+ or %r18,%r19,%r20
+ or %r21,%r22,%r23
+ or %r24,%r25,%r26
+ or %r27,%r28,%r29
+ or %r30,%r31,%r0
+
+ xor %r0,%r1,%r2
+ xor %r3,%r4,%r5
+ xor %r6,%r7,%r8
+ xor %r9,%r10,%r11
+ xor %r12,%r13,%r14
+ xor %r15,%r16,%r17
+ xor %r18,%r19,%r20
+ xor %r21,%r22,%r23
+ xor %r24,%r25,%r26
+ xor %r27,%r28,%r29
+ xor %r30,%r31,%r0
+
+ # Immediate forms (all)
+ and 0,%r1,%r2
+ and 8192,%r4,%r5
+ and 5109,%r7,%r8
+ and 32768,%r10,%r11
+ and 65000,%r13,%r14
+ and 65535,%r16,%r17
+ and 0xffff,%r19,%r20
+ and 0xabcd,%r22,%r23
+ and 0x1234,%r25,%r26
+ and 0x0,%r28,%r29
+ and 0x3,%r31,%r0
+
+ andh 1,%r1,%r2
+ andh 8193,%r4,%r5
+ andh 5110,%r7,%r8
+ andh 32769,%r10,%r11
+ andh 65001,%r13,%r14
+ andh 65535,%r16,%r17
+ andh 0xffff,%r19,%r20
+ andh 0xabcd,%r22,%r23
+ andh 0x1234,%r25,%r26
+ andh 0x0,%r28,%r29
+ andh 0x3,%r31,%r0
+
+ andnot 0,%r1,%r2
+ andnot 8192,%r4,%r5
+ andnot 5109,%r7,%r8
+ andnot 32768,%r10,%r11
+ andnot 65000,%r13,%r14
+ andnot 65535,%r16,%r17
+ andnot 0xffff,%r19,%r20
+ andnot 0xabcd,%r22,%r23
+ andnot 0x1234,%r25,%r26
+ andnot 0x0,%r28,%r29
+ andnot 0x3,%r31,%r0
+
+ andnoth 1,%r1,%r2
+ andnoth 8193,%r4,%r5
+ andnoth 5110,%r7,%r8
+ andnoth 32769,%r10,%r11
+ andnoth 65001,%r13,%r14
+ andnoth 65535,%r16,%r17
+ andnoth 0xffff,%r19,%r20
+ andnoth 0xabcd,%r22,%r23
+ andnoth 0x1234,%r25,%r26
+ andnoth 0x0,%r28,%r29
+ andnoth 0x3,%r31,%r0
+
+ or 0,%r1,%r2
+ or 1,%r4,%r5
+ or 2,%r7,%r8
+ or 3,%r10,%r11
+ or 65000,%r13,%r14
+ or 65535,%r16,%r17
+ or 0xffff,%r19,%r20
+ or 0xabcd,%r22,%r23
+ or 0x1234,%r25,%r26
+ or 0x0,%r28,%r29
+ or 0x3,%r31,%r0
+
+ orh 0,%r1,%r2
+ orh 1,%r4,%r5
+ orh 2,%r7,%r8
+ orh 3,%r10,%r11
+ orh 65000,%r13,%r14
+ orh 65535,%r16,%r17
+ orh 0xffff,%r19,%r20
+ orh 0xabcd,%r22,%r23
+ orh 0x1234,%r25,%r26
+ orh 0x0,%r28,%r29
+ orh 0x3,%r31,%r0
+
+ xor 0,%r1,%r2
+ xor 1,%r4,%r5
+ xor 2,%r7,%r8
+ xor 3,%r10,%r11
+ xor 65000,%r13,%r14
+ xor 65535,%r16,%r17
+ xor 0xffff,%r19,%r20
+ xor 0xabcd,%r22,%r23
+ xor 0x1234,%r25,%r26
+ xor 0x0,%r28,%r29
+ xor 0x3,%r31,%r0
+
+ xorh 0,%r1,%r2
+ xorh 1,%r4,%r5
+ xorh 2,%r7,%r8
+ xorh 3,%r10,%r11
+ xorh 65000,%r13,%r14
+ xorh 65535,%r16,%r17
+ xorh 0xffff,%r19,%r20
+ xorh 0xabcd,%r22,%r23
+ xorh 0x1234,%r25,%r26
+ xorh 0x0,%r28,%r29
+ xorh 0x3,%r31,%r0
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: bte/btne
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <some_label-0xb8>:
+ 0: 2d 00 e0 57 btne 0,%r31,0x000000b8 // b8 <some_label>
+ 4: 2c 08 a0 57 btne 1,%r29,0x000000b8 // b8 <some_label>
+ 8: 2b 10 60 57 btne 2,%r27,0x000000b8 // b8 <some_label>
+ c: 2a 18 20 57 btne 3,%r25,0x000000b8 // b8 <some_label>
+ 10: 29 50 e0 56 btne 10,%r23,0x000000b8 // b8 <some_label>
+ 14: 28 58 a0 56 btne 11,%r21,0x000000b8 // b8 <some_label>
+ 18: 27 60 60 56 btne 12,%r19,0x000000b8 // b8 <some_label>
+ 1c: 26 e8 20 56 btne 29,%r17,0x000000b8 // b8 <some_label>
+ 20: 25 f0 00 56 btne 30,%r16,0x000000b8 // b8 <some_label>
+ 24: 24 f8 00 55 btne 31,%r8,0x000000b8 // b8 <some_label>
+ 28: 00 78 00 54 btne 15,%r0,0x0000002c // 2c <some_label-0x8c>
+ 28: R_860_PC16 some_fake_extern
+ 2c: 22 00 e0 5f bte 0,%r31,0x000000b8 // b8 <some_label>
+ 30: 21 08 a0 5f bte 1,%r29,0x000000b8 // b8 <some_label>
+ 34: 20 10 60 5f bte 2,%r27,0x000000b8 // b8 <some_label>
+ 38: 1f 18 20 5f bte 3,%r25,0x000000b8 // b8 <some_label>
+ 3c: 1e 50 e0 5e bte 10,%r23,0x000000b8 // b8 <some_label>
+ 40: 1d 58 a0 5e bte 11,%r21,0x000000b8 // b8 <some_label>
+ 44: 1c 60 60 5e bte 12,%r19,0x000000b8 // b8 <some_label>
+ 48: 1b e8 20 5e bte 29,%r17,0x000000b8 // b8 <some_label>
+ 4c: 1a f0 00 5e bte 30,%r16,0x000000b8 // b8 <some_label>
+ 50: 19 f8 00 5d bte 31,%r8,0x000000b8 // b8 <some_label>
+ 54: 00 78 00 5c bte 15,%r0,0x00000058 // 58 <some_label-0x60>
+ 54: R_860_PC16 some_fake_extern
+ 58: 17 00 e0 53 btne %r0,%r31,0x000000b8 // b8 <some_label>
+ 5c: 16 08 a0 53 btne %r1,%r29,0x000000b8 // b8 <some_label>
+ 60: 15 10 60 53 btne %sp,%r27,0x000000b8 // b8 <some_label>
+ 64: 14 18 20 53 btne %fp,%r25,0x000000b8 // b8 <some_label>
+ 68: 13 50 e0 52 btne %r10,%r23,0x000000b8 // b8 <some_label>
+ 6c: 12 58 a0 52 btne %r11,%r21,0x000000b8 // b8 <some_label>
+ 70: 11 60 60 52 btne %r12,%r19,0x000000b8 // b8 <some_label>
+ 74: 10 e8 20 52 btne %r29,%r17,0x000000b8 // b8 <some_label>
+ 78: 0f f0 00 52 btne %r30,%r16,0x000000b8 // b8 <some_label>
+ 7c: 0e f8 00 51 btne %r31,%r8,0x000000b8 // b8 <some_label>
+ 80: 00 78 00 50 btne %r15,%r0,0x00000084 // 84 <some_label-0x34>
+ 80: R_860_PC16 some_fake_extern
+ 84: 0c 00 e0 5b bte %r0,%r31,0x000000b8 // b8 <some_label>
+ 88: 0b 08 a0 5b bte %r1,%r29,0x000000b8 // b8 <some_label>
+ 8c: 0a 10 60 5b bte %sp,%r27,0x000000b8 // b8 <some_label>
+ 90: 09 18 20 5b bte %fp,%r25,0x000000b8 // b8 <some_label>
+ 94: 08 50 e0 5a bte %r10,%r23,0x000000b8 // b8 <some_label>
+ 98: 07 58 a0 5a bte %r11,%r21,0x000000b8 // b8 <some_label>
+ 9c: 06 60 60 5a bte %r12,%r19,0x000000b8 // b8 <some_label>
+ a0: 05 e8 20 5a bte %r29,%r17,0x000000b8 // b8 <some_label>
+ a4: 04 f0 00 5a bte %r30,%r16,0x000000b8 // b8 <some_label>
+ a8: 03 f8 00 59 bte %r31,%r8,0x000000b8 // b8 <some_label>
+ ac: 00 78 00 58 bte %r15,%r0,0x000000b0 // b0 <some_label-0x8>
+ ac: R_860_PC16 some_fake_extern
+ b0: 00 00 00 a0 shl %r0,%r0,%r0
+ b4: 00 00 00 a0 shl %r0,%r0,%r0
+
+000000b8 <some_label>:
+ b8: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# bte, btne
+ .text
+
+ btne 0,%r31,some_label
+ btne 1,%r29,some_label
+ btne 2,%r27,some_label
+ btne 3,%r25,some_label
+ btne 10,%r23,some_label
+ btne 11,%r21,some_label
+ btne 12,%r19,some_label
+ btne 29,%r17,some_label
+ btne 30,%r16,some_label
+ btne 31,%r8,some_label
+ btne 15,%r0,some_fake_extern
+
+ bte 0,%r31,some_label
+ bte 1,%r29,some_label
+ bte 2,%r27,some_label
+ bte 3,%r25,some_label
+ bte 10,%r23,some_label
+ bte 11,%r21,some_label
+ bte 12,%r19,some_label
+ bte 29,%r17,some_label
+ bte 30,%r16,some_label
+ bte 31,%r8,some_label
+ bte 15,%r0,some_fake_extern
+
+ btne %r0,%r31,some_label
+ btne %r1,%r29,some_label
+ btne %r2,%r27,some_label
+ btne %r3,%r25,some_label
+ btne %r10,%r23,some_label
+ btne %r11,%r21,some_label
+ btne %r12,%r19,some_label
+ btne %r29,%r17,some_label
+ btne %r30,%r16,some_label
+ btne %r31,%r8,some_label
+ btne %r15,%r0,some_fake_extern
+
+ bte %r0,%r31,some_label
+ bte %r1,%r29,some_label
+ bte %r2,%r27,some_label
+ bte %r3,%r25,some_label
+ bte %r10,%r23,some_label
+ bte %r11,%r21,some_label
+ bte %r12,%r19,some_label
+ bte %r29,%r17,some_label
+ bte %r30,%r16,some_label
+ bte %r31,%r8,some_label
+ bte %r15,%r0,some_fake_extern
+
+ nop
+ nop
+some_label:
+ nop
--- /dev/null
+#as:
+#objdump: -dr
+#name: fldst01 (fld.l)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 02 00 00 24 fld.l 0\(%r0\),%f0
+ 4: 7e 00 3f 24 fld.l 124\(%r1\),%f31
+ 8: 02 01 5e 24 fld.l 256\(%sp\),%f30
+ c: 02 02 7d 24 fld.l 512\(%fp\),%f29
+ 10: 02 04 9c 24 fld.l 1024\(%r4\),%f28
+ 14: 02 10 bb 24 fld.l 4096\(%r5\),%f27
+ 18: 02 20 da 24 fld.l 8192\(%r6\),%f26
+ 1c: 02 40 f9 24 fld.l 16384\(%r7\),%f25
+ 20: fe 7f f9 24 fld.l 32764\(%r7\),%f25
+ 24: 02 80 f7 24 fld.l -32768\(%r7\),%f23
+ 28: 02 c0 02 25 fld.l -16384\(%r8\),%f2
+ 2c: 02 e0 23 25 fld.l -8192\(%r9\),%f3
+ 30: 02 f0 48 25 fld.l -4096\(%r10\),%f8
+ 34: 02 fc 69 25 fld.l -1024\(%r11\),%f9
+ 38: 06 fe 8c 25 fld.l -508\(%r12\),%f12
+ 3c: 0a ff b3 25 fld.l -248\(%r13\),%f19
+ 40: fe ff d5 25 fld.l -4\(%r14\),%f21
+ 44: 03 00 00 24 fld.l 0\(%r0\)\+\+,%f0
+ 48: 7f 00 21 24 fld.l 124\(%r1\)\+\+,%f1
+ 4c: 03 01 42 24 fld.l 256\(%sp\)\+\+,%f2
+ 50: 03 02 63 24 fld.l 512\(%fp\)\+\+,%f3
+ 54: 03 04 84 24 fld.l 1024\(%r4\)\+\+,%f4
+ 58: 03 10 a5 24 fld.l 4096\(%r5\)\+\+,%f5
+ 5c: 03 20 c6 24 fld.l 8192\(%r6\)\+\+,%f6
+ 60: 03 40 e7 24 fld.l 16384\(%r7\)\+\+,%f7
+ 64: ff 7f e8 24 fld.l 32764\(%r7\)\+\+,%f8
+ 68: 03 80 e9 24 fld.l -32768\(%r7\)\+\+,%f9
+ 6c: 03 c0 0a 25 fld.l -16384\(%r8\)\+\+,%f10
+ 70: 03 e0 2b 25 fld.l -8192\(%r9\)\+\+,%f11
+ 74: 03 f0 4c 25 fld.l -4096\(%r10\)\+\+,%f12
+ 78: 03 fc 6d 25 fld.l -1024\(%r11\)\+\+,%f13
+ 7c: 07 fe 8e 25 fld.l -508\(%r12\)\+\+,%f14
+ 80: 0b ff af 25 fld.l -248\(%r13\)\+\+,%f15
+ 84: ff ff d0 25 fld.l -4\(%r14\)\+\+,%f16
+ 88: 02 28 00 20 fld.l %r5\(%r0\),%f0
+ 8c: 02 30 3f 20 fld.l %r6\(%r1\),%f31
+ 90: 02 38 5e 20 fld.l %r7\(%sp\),%f30
+ 94: 02 40 7d 20 fld.l %r8\(%fp\),%f29
+ 98: 02 48 9c 20 fld.l %r9\(%r4\),%f28
+ 9c: 02 00 bb 20 fld.l %r0\(%r5\),%f27
+ a0: 02 08 da 20 fld.l %r1\(%r6\),%f26
+ a4: 02 60 f9 20 fld.l %r12\(%r7\),%f25
+ a8: 02 68 18 21 fld.l %r13\(%r8\),%f24
+ ac: 02 70 37 21 fld.l %r14\(%r9\),%f23
+ b0: 02 78 56 21 fld.l %r15\(%r10\),%f22
+ b4: 02 80 75 21 fld.l %r16\(%r11\),%f21
+ b8: 02 88 94 21 fld.l %r17\(%r12\),%f20
+ bc: 02 e0 b3 21 fld.l %r28\(%r13\),%f19
+ c0: 02 f8 d2 21 fld.l %r31\(%r14\),%f18
+ c4: 03 28 00 20 fld.l %r5\(%r0\)\+\+,%f0
+ c8: 03 30 21 20 fld.l %r6\(%r1\)\+\+,%f1
+ cc: 03 38 42 20 fld.l %r7\(%sp\)\+\+,%f2
+ d0: 03 40 63 20 fld.l %r8\(%fp\)\+\+,%f3
+ d4: 03 48 84 20 fld.l %r9\(%r4\)\+\+,%f4
+ d8: 03 00 a5 20 fld.l %r0\(%r5\)\+\+,%f5
+ dc: 03 08 c6 20 fld.l %r1\(%r6\)\+\+,%f6
+ e0: 03 60 e7 20 fld.l %r12\(%r7\)\+\+,%f7
+ e4: 03 68 08 21 fld.l %r13\(%r8\)\+\+,%f8
+ e8: 03 70 29 21 fld.l %r14\(%r9\)\+\+,%f9
+ ec: 03 78 4a 21 fld.l %r15\(%r10\)\+\+,%f10
+ f0: 03 80 6b 21 fld.l %r16\(%r11\)\+\+,%f11
+ f4: 03 88 8c 21 fld.l %r17\(%r12\)\+\+,%f12
+ f8: 03 e0 ad 21 fld.l %r28\(%r13\)\+\+,%f13
+ fc: 03 f8 ce 21 fld.l %r31\(%r14\)\+\+,%f14
--- /dev/null
+# fld.l (no relocations here)
+ .text
+
+ # Immediate form, no auto-increment.
+ fld.l 0(%r0),%f0
+ fld.l 124(%r1),%f31
+ fld.l 256(%r2),%f30
+ fld.l 512(%r3),%f29
+ fld.l 1024(%r4),%f28
+ fld.l 4096(%r5),%f27
+ fld.l 8192(%r6),%f26
+ fld.l 16384(%r7),%f25
+ fld.l 32764(%r7),%f25
+ fld.l -32768(%r7),%f23
+ fld.l -16384(%r8),%f2
+ fld.l -8192(%r9),%f3
+ fld.l -4096(%r10),%f8
+ fld.l -1024(%r11),%f9
+ fld.l -508(%r12),%f12
+ fld.l -248(%r13),%f19
+ fld.l -4(%r14),%f21
+
+ # Immediate form, with auto-increment.
+ fld.l 0(%r0)++,%f0
+ fld.l 124(%r1)++,%f1
+ fld.l 256(%r2)++,%f2
+ fld.l 512(%r3)++,%f3
+ fld.l 1024(%r4)++,%f4
+ fld.l 4096(%r5)++,%f5
+ fld.l 8192(%r6)++,%f6
+ fld.l 16384(%r7)++,%f7
+ fld.l 32764(%r7)++,%f8
+ fld.l -32768(%r7)++,%f9
+ fld.l -16384(%r8)++,%f10
+ fld.l -8192(%r9)++,%f11
+ fld.l -4096(%r10)++,%f12
+ fld.l -1024(%r11)++,%f13
+ fld.l -508(%r12)++,%f14
+ fld.l -248(%r13)++,%f15
+ fld.l -4(%r14)++,%f16
+
+ # Index form, no auto-increment.
+ fld.l %r5(%r0),%f0
+ fld.l %r6(%r1),%f31
+ fld.l %r7(%r2),%f30
+ fld.l %r8(%r3),%f29
+ fld.l %r9(%r4),%f28
+ fld.l %r0(%r5),%f27
+ fld.l %r1(%r6),%f26
+ fld.l %r12(%r7),%f25
+ fld.l %r13(%r8),%f24
+ fld.l %r14(%r9),%f23
+ fld.l %r15(%r10),%f22
+ fld.l %r16(%r11),%f21
+ fld.l %r17(%r12),%f20
+ fld.l %r28(%r13),%f19
+ fld.l %r31(%r14),%f18
+
+ # Index form, with auto-increment.
+ fld.l %r5(%r0)++,%f0
+ fld.l %r6(%r1)++,%f1
+ fld.l %r7(%r2)++,%f2
+ fld.l %r8(%r3)++,%f3
+ fld.l %r9(%r4)++,%f4
+ fld.l %r0(%r5)++,%f5
+ fld.l %r1(%r6)++,%f6
+ fld.l %r12(%r7)++,%f7
+ fld.l %r13(%r8)++,%f8
+ fld.l %r14(%r9)++,%f9
+ fld.l %r15(%r10)++,%f10
+ fld.l %r16(%r11)++,%f11
+ fld.l %r17(%r12)++,%f12
+ fld.l %r28(%r13)++,%f13
+ fld.l %r31(%r14)++,%f14
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: fldst02 (fld.d)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 00 24 fld.d 0\(%r0\),%f0
+ 4: 80 00 3e 24 fld.d 128\(%r1\),%f30
+ 8: 00 01 5c 24 fld.d 256\(%sp\),%f28
+ c: 00 02 7a 24 fld.d 512\(%fp\),%f26
+ 10: 00 04 98 24 fld.d 1024\(%r4\),%f24
+ 14: 00 10 b6 24 fld.d 4096\(%r5\),%f22
+ 18: 00 20 d4 24 fld.d 8192\(%r6\),%f20
+ 1c: 00 40 f2 24 fld.d 16384\(%r7\),%f18
+ 20: f8 7f f0 24 fld.d 32760\(%r7\),%f16
+ 24: 00 80 ee 24 fld.d -32768\(%r7\),%f14
+ 28: 00 c0 0c 25 fld.d -16384\(%r8\),%f12
+ 2c: 00 e0 2a 25 fld.d -8192\(%r9\),%f10
+ 30: 00 f0 48 25 fld.d -4096\(%r10\),%f8
+ 34: 00 fc 66 25 fld.d -1024\(%r11\),%f6
+ 38: 00 fe 84 25 fld.d -512\(%r12\),%f4
+ 3c: 08 ff a2 25 fld.d -248\(%r13\),%f2
+ 40: f8 ff c0 25 fld.d -8\(%r14\),%f0
+ 44: 01 00 00 24 fld.d 0\(%r0\)\+\+,%f0
+ 48: 81 00 22 24 fld.d 128\(%r1\)\+\+,%f2
+ 4c: 01 01 44 24 fld.d 256\(%sp\)\+\+,%f4
+ 50: 01 02 66 24 fld.d 512\(%fp\)\+\+,%f6
+ 54: 01 04 88 24 fld.d 1024\(%r4\)\+\+,%f8
+ 58: 01 10 aa 24 fld.d 4096\(%r5\)\+\+,%f10
+ 5c: 01 20 cc 24 fld.d 8192\(%r6\)\+\+,%f12
+ 60: 01 40 ee 24 fld.d 16384\(%r7\)\+\+,%f14
+ 64: f9 7f f0 24 fld.d 32760\(%r7\)\+\+,%f16
+ 68: 01 80 f2 24 fld.d -32768\(%r7\)\+\+,%f18
+ 6c: 01 c0 14 25 fld.d -16384\(%r8\)\+\+,%f20
+ 70: 01 e0 36 25 fld.d -8192\(%r9\)\+\+,%f22
+ 74: 01 f0 58 25 fld.d -4096\(%r10\)\+\+,%f24
+ 78: 01 fc 7a 25 fld.d -1024\(%r11\)\+\+,%f26
+ 7c: 01 fe 9c 25 fld.d -512\(%r12\)\+\+,%f28
+ 80: 09 ff be 25 fld.d -248\(%r13\)\+\+,%f30
+ 84: f9 ff d0 25 fld.d -8\(%r14\)\+\+,%f16
+ 88: 00 28 00 20 fld.d %r5\(%r0\),%f0
+ 8c: 00 30 3e 20 fld.d %r6\(%r1\),%f30
+ 90: 00 38 5c 20 fld.d %r7\(%sp\),%f28
+ 94: 00 40 7a 20 fld.d %r8\(%fp\),%f26
+ 98: 00 48 98 20 fld.d %r9\(%r4\),%f24
+ 9c: 00 00 b6 20 fld.d %r0\(%r5\),%f22
+ a0: 00 08 d4 20 fld.d %r1\(%r6\),%f20
+ a4: 00 60 f2 20 fld.d %r12\(%r7\),%f18
+ a8: 00 68 10 21 fld.d %r13\(%r8\),%f16
+ ac: 00 70 2e 21 fld.d %r14\(%r9\),%f14
+ b0: 00 78 4c 21 fld.d %r15\(%r10\),%f12
+ b4: 00 80 6a 21 fld.d %r16\(%r11\),%f10
+ b8: 00 88 88 21 fld.d %r17\(%r12\),%f8
+ bc: 00 e0 a6 21 fld.d %r28\(%r13\),%f6
+ c0: 00 f8 c4 21 fld.d %r31\(%r14\),%f4
+ c4: 01 28 00 20 fld.d %r5\(%r0\)\+\+,%f0
+ c8: 01 30 22 20 fld.d %r6\(%r1\)\+\+,%f2
+ cc: 01 38 44 20 fld.d %r7\(%sp\)\+\+,%f4
+ d0: 01 40 66 20 fld.d %r8\(%fp\)\+\+,%f6
+ d4: 01 48 88 20 fld.d %r9\(%r4\)\+\+,%f8
+ d8: 01 00 aa 20 fld.d %r0\(%r5\)\+\+,%f10
+ dc: 01 08 cc 20 fld.d %r1\(%r6\)\+\+,%f12
+ e0: 01 60 ee 20 fld.d %r12\(%r7\)\+\+,%f14
+ e4: 01 68 10 21 fld.d %r13\(%r8\)\+\+,%f16
+ e8: 01 70 32 21 fld.d %r14\(%r9\)\+\+,%f18
+ ec: 01 78 54 21 fld.d %r15\(%r10\)\+\+,%f20
+ f0: 01 80 76 21 fld.d %r16\(%r11\)\+\+,%f22
+ f4: 01 88 98 21 fld.d %r17\(%r12\)\+\+,%f24
+ f8: 01 e0 ba 21 fld.d %r28\(%r13\)\+\+,%f26
+ fc: 01 f8 de 21 fld.d %r31\(%r14\)\+\+,%f30
--- /dev/null
+# fld.d (no relocations here)
+ .text
+
+ # Immediate form, no auto-increment.
+ fld.d 0(%r0),%f0
+ fld.d 128(%r1),%f30
+ fld.d 256(%r2),%f28
+ fld.d 512(%r3),%f26
+ fld.d 1024(%r4),%f24
+ fld.d 4096(%r5),%f22
+ fld.d 8192(%r6),%f20
+ fld.d 16384(%r7),%f18
+ fld.d 32760(%r7),%f16
+ fld.d -32768(%r7),%f14
+ fld.d -16384(%r8),%f12
+ fld.d -8192(%r9),%f10
+ fld.d -4096(%r10),%f8
+ fld.d -1024(%r11),%f6
+ fld.d -512(%r12),%f4
+ fld.d -248(%r13),%f2
+ fld.d -8(%r14),%f0
+
+ # Immediate form, with auto-increment.
+ fld.d 0(%r0)++,%f0
+ fld.d 128(%r1)++,%f2
+ fld.d 256(%r2)++,%f4
+ fld.d 512(%r3)++,%f6
+ fld.d 1024(%r4)++,%f8
+ fld.d 4096(%r5)++,%f10
+ fld.d 8192(%r6)++,%f12
+ fld.d 16384(%r7)++,%f14
+ fld.d 32760(%r7)++,%f16
+ fld.d -32768(%r7)++,%f18
+ fld.d -16384(%r8)++,%f20
+ fld.d -8192(%r9)++,%f22
+ fld.d -4096(%r10)++,%f24
+ fld.d -1024(%r11)++,%f26
+ fld.d -512(%r12)++,%f28
+ fld.d -248(%r13)++,%f30
+ fld.d -8(%r14)++,%f16
+
+ # Index form, no auto-increment.
+ fld.d %r5(%r0),%f0
+ fld.d %r6(%r1),%f30
+ fld.d %r7(%r2),%f28
+ fld.d %r8(%r3),%f26
+ fld.d %r9(%r4),%f24
+ fld.d %r0(%r5),%f22
+ fld.d %r1(%r6),%f20
+ fld.d %r12(%r7),%f18
+ fld.d %r13(%r8),%f16
+ fld.d %r14(%r9),%f14
+ fld.d %r15(%r10),%f12
+ fld.d %r16(%r11),%f10
+ fld.d %r17(%r12),%f8
+ fld.d %r28(%r13),%f6
+ fld.d %r31(%r14),%f4
+
+ # Index form, with auto-increment.
+ fld.d %r5(%r0)++,%f0
+ fld.d %r6(%r1)++,%f2
+ fld.d %r7(%r2)++,%f4
+ fld.d %r8(%r3)++,%f6
+ fld.d %r9(%r4)++,%f8
+ fld.d %r0(%r5)++,%f10
+ fld.d %r1(%r6)++,%f12
+ fld.d %r12(%r7)++,%f14
+ fld.d %r13(%r8)++,%f16
+ fld.d %r14(%r9)++,%f18
+ fld.d %r15(%r10)++,%f20
+ fld.d %r16(%r11)++,%f22
+ fld.d %r17(%r12)++,%f24
+ fld.d %r28(%r13)++,%f26
+ fld.d %r31(%r14)++,%f30
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: fldst03 (fld.q)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 04 00 00 24 fld.q 0\(%r0\),%f0
+ 4: 84 00 3c 24 fld.q 128\(%r1\),%f28
+ 8: 04 01 58 24 fld.q 256\(%sp\),%f24
+ c: 04 02 74 24 fld.q 512\(%fp\),%f20
+ 10: 04 04 90 24 fld.q 1024\(%r4\),%f16
+ 14: 04 10 ac 24 fld.q 4096\(%r5\),%f12
+ 18: 04 20 c8 24 fld.q 8192\(%r6\),%f8
+ 1c: 04 40 e4 24 fld.q 16384\(%r7\),%f4
+ 20: f4 7f e0 24 fld.q 32752\(%r7\),%f0
+ 24: 04 80 fc 24 fld.q -32768\(%r7\),%f28
+ 28: 04 c0 18 25 fld.q -16384\(%r8\),%f24
+ 2c: 04 e0 34 25 fld.q -8192\(%r9\),%f20
+ 30: 04 f0 50 25 fld.q -4096\(%r10\),%f16
+ 34: 04 fc 6c 25 fld.q -1024\(%r11\),%f12
+ 38: 04 fe 88 25 fld.q -512\(%r12\),%f8
+ 3c: 04 ff a4 25 fld.q -256\(%r13\),%f4
+ 40: f4 ff c0 25 fld.q -16\(%r14\),%f0
+ 44: 05 00 00 24 fld.q 0\(%r0\)\+\+,%f0
+ 48: 85 00 24 24 fld.q 128\(%r1\)\+\+,%f4
+ 4c: 05 01 48 24 fld.q 256\(%sp\)\+\+,%f8
+ 50: 05 02 6c 24 fld.q 512\(%fp\)\+\+,%f12
+ 54: 05 04 90 24 fld.q 1024\(%r4\)\+\+,%f16
+ 58: 05 10 b4 24 fld.q 4096\(%r5\)\+\+,%f20
+ 5c: 05 20 d8 24 fld.q 8192\(%r6\)\+\+,%f24
+ 60: 05 40 fc 24 fld.q 16384\(%r7\)\+\+,%f28
+ 64: f5 7f e0 24 fld.q 32752\(%r7\)\+\+,%f0
+ 68: 05 80 e4 24 fld.q -32768\(%r7\)\+\+,%f4
+ 6c: 05 c0 08 25 fld.q -16384\(%r8\)\+\+,%f8
+ 70: 05 e0 2c 25 fld.q -8192\(%r9\)\+\+,%f12
+ 74: 05 f0 50 25 fld.q -4096\(%r10\)\+\+,%f16
+ 78: 05 fc 74 25 fld.q -1024\(%r11\)\+\+,%f20
+ 7c: 05 fe 98 25 fld.q -512\(%r12\)\+\+,%f24
+ 80: 05 ff bc 25 fld.q -256\(%r13\)\+\+,%f28
+ 84: f5 ff d0 25 fld.q -16\(%r14\)\+\+,%f16
+ 88: 04 28 00 20 fld.q %r5\(%r0\),%f0
+ 8c: 04 30 34 20 fld.q %r6\(%r1\),%f20
+ 90: 04 38 50 20 fld.q %r7\(%sp\),%f16
+ 94: 04 40 6c 20 fld.q %r8\(%fp\),%f12
+ 98: 04 48 88 20 fld.q %r9\(%r4\),%f8
+ 9c: 04 00 a4 20 fld.q %r0\(%r5\),%f4
+ a0: 04 08 c0 20 fld.q %r1\(%r6\),%f0
+ a4: 04 60 fc 20 fld.q %r12\(%r7\),%f28
+ a8: 04 68 18 21 fld.q %r13\(%r8\),%f24
+ ac: 04 70 34 21 fld.q %r14\(%r9\),%f20
+ b0: 04 78 50 21 fld.q %r15\(%r10\),%f16
+ b4: 04 80 6c 21 fld.q %r16\(%r11\),%f12
+ b8: 04 88 88 21 fld.q %r17\(%r12\),%f8
+ bc: 04 e0 a4 21 fld.q %r28\(%r13\),%f4
+ c0: 04 f8 c0 21 fld.q %r31\(%r14\),%f0
+ c4: 05 28 00 20 fld.q %r5\(%r0\)\+\+,%f0
+ c8: 05 30 24 20 fld.q %r6\(%r1\)\+\+,%f4
+ cc: 05 38 48 20 fld.q %r7\(%sp\)\+\+,%f8
+ d0: 05 40 6c 20 fld.q %r8\(%fp\)\+\+,%f12
+ d4: 05 48 90 20 fld.q %r9\(%r4\)\+\+,%f16
+ d8: 05 00 b4 20 fld.q %r0\(%r5\)\+\+,%f20
+ dc: 05 08 d8 20 fld.q %r1\(%r6\)\+\+,%f24
+ e0: 05 60 fc 20 fld.q %r12\(%r7\)\+\+,%f28
+ e4: 05 68 00 21 fld.q %r13\(%r8\)\+\+,%f0
+ e8: 05 70 24 21 fld.q %r14\(%r9\)\+\+,%f4
+ ec: 05 78 48 21 fld.q %r15\(%r10\)\+\+,%f8
+ f0: 05 80 6c 21 fld.q %r16\(%r11\)\+\+,%f12
+ f4: 05 88 90 21 fld.q %r17\(%r12\)\+\+,%f16
+ f8: 05 e0 b4 21 fld.q %r28\(%r13\)\+\+,%f20
+ fc: 05 f8 d8 21 fld.q %r31\(%r14\)\+\+,%f24
--- /dev/null
+# fld.q (no relocations here)
+ .text
+
+ # Immediate form, no auto-increment.
+ fld.q 0(%r0),%f0
+ fld.q 128(%r1),%f28
+ fld.q 256(%r2),%f24
+ fld.q 512(%r3),%f20
+ fld.q 1024(%r4),%f16
+ fld.q 4096(%r5),%f12
+ fld.q 8192(%r6),%f8
+ fld.q 16384(%r7),%f4
+ fld.q 32752(%r7),%f0
+ fld.q -32768(%r7),%f28
+ fld.q -16384(%r8),%f24
+ fld.q -8192(%r9),%f20
+ fld.q -4096(%r10),%f16
+ fld.q -1024(%r11),%f12
+ fld.q -512(%r12),%f8
+ fld.q -256(%r13),%f4
+ fld.q -16(%r14),%f0
+
+ # Immediate form, with auto-increment.
+ fld.q 0(%r0)++,%f0
+ fld.q 128(%r1)++,%f4
+ fld.q 256(%r2)++,%f8
+ fld.q 512(%r3)++,%f12
+ fld.q 1024(%r4)++,%f16
+ fld.q 4096(%r5)++,%f20
+ fld.q 8192(%r6)++,%f24
+ fld.q 16384(%r7)++,%f28
+ fld.q 32752(%r7)++,%f0
+ fld.q -32768(%r7)++,%f4
+ fld.q -16384(%r8)++,%f8
+ fld.q -8192(%r9)++,%f12
+ fld.q -4096(%r10)++,%f16
+ fld.q -1024(%r11)++,%f20
+ fld.q -512(%r12)++,%f24
+ fld.q -256(%r13)++,%f28
+ fld.q -16(%r14)++,%f16
+
+ # Index form, no auto-increment.
+ fld.q %r5(%r0),%f0
+ fld.q %r6(%r1),%f20
+ fld.q %r7(%r2),%f16
+ fld.q %r8(%r3),%f12
+ fld.q %r9(%r4),%f8
+ fld.q %r0(%r5),%f4
+ fld.q %r1(%r6),%f0
+ fld.q %r12(%r7),%f28
+ fld.q %r13(%r8),%f24
+ fld.q %r14(%r9),%f20
+ fld.q %r15(%r10),%f16
+ fld.q %r16(%r11),%f12
+ fld.q %r17(%r12),%f8
+ fld.q %r28(%r13),%f4
+ fld.q %r31(%r14),%f0
+
+ # Index form, with auto-increment.
+ fld.q %r5(%r0)++,%f0
+ fld.q %r6(%r1)++,%f4
+ fld.q %r7(%r2)++,%f8
+ fld.q %r8(%r3)++,%f12
+ fld.q %r9(%r4)++,%f16
+ fld.q %r0(%r5)++,%f20
+ fld.q %r1(%r6)++,%f24
+ fld.q %r12(%r7)++,%f28
+ fld.q %r13(%r8)++,%f0
+ fld.q %r14(%r9)++,%f4
+ fld.q %r15(%r10)++,%f8
+ fld.q %r16(%r11)++,%f12
+ fld.q %r17(%r12)++,%f16
+ fld.q %r28(%r13)++,%f20
+ fld.q %r31(%r14)++,%f24
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: fldst04 (fst.l)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 02 00 00 2c fst.l %f0,0\(%r0\)
+ 4: 7e 00 3f 2c fst.l %f31,124\(%r1\)
+ 8: 02 01 5e 2c fst.l %f30,256\(%sp\)
+ c: 02 02 7d 2c fst.l %f29,512\(%fp\)
+ 10: 02 04 9c 2c fst.l %f28,1024\(%r4\)
+ 14: 02 10 bb 2c fst.l %f27,4096\(%r5\)
+ 18: 02 20 da 2c fst.l %f26,8192\(%r6\)
+ 1c: 02 40 f9 2c fst.l %f25,16384\(%r7\)
+ 20: fe 7f f9 2c fst.l %f25,32764\(%r7\)
+ 24: 02 80 f7 2c fst.l %f23,-32768\(%r7\)
+ 28: 02 c0 02 2d fst.l %f2,-16384\(%r8\)
+ 2c: 02 e0 23 2d fst.l %f3,-8192\(%r9\)
+ 30: 02 f0 48 2d fst.l %f8,-4096\(%r10\)
+ 34: 02 fc 69 2d fst.l %f9,-1024\(%r11\)
+ 38: 06 fe 8c 2d fst.l %f12,-508\(%r12\)
+ 3c: 0a ff b3 2d fst.l %f19,-248\(%r13\)
+ 40: fe ff d5 2d fst.l %f21,-4\(%r14\)
+ 44: 03 00 00 2c fst.l %f0,0\(%r0\)\+\+
+ 48: 7f 00 21 2c fst.l %f1,124\(%r1\)\+\+
+ 4c: 03 01 42 2c fst.l %f2,256\(%sp\)\+\+
+ 50: 03 02 63 2c fst.l %f3,512\(%fp\)\+\+
+ 54: 03 04 84 2c fst.l %f4,1024\(%r4\)\+\+
+ 58: 03 10 a5 2c fst.l %f5,4096\(%r5\)\+\+
+ 5c: 03 20 c6 2c fst.l %f6,8192\(%r6\)\+\+
+ 60: 03 40 e7 2c fst.l %f7,16384\(%r7\)\+\+
+ 64: ff 7f e8 2c fst.l %f8,32764\(%r7\)\+\+
+ 68: 03 80 e9 2c fst.l %f9,-32768\(%r7\)\+\+
+ 6c: 03 c0 0a 2d fst.l %f10,-16384\(%r8\)\+\+
+ 70: 03 e0 2b 2d fst.l %f11,-8192\(%r9\)\+\+
+ 74: 03 f0 4c 2d fst.l %f12,-4096\(%r10\)\+\+
+ 78: 03 fc 6d 2d fst.l %f13,-1024\(%r11\)\+\+
+ 7c: 07 fe 8e 2d fst.l %f14,-508\(%r12\)\+\+
+ 80: 0b ff af 2d fst.l %f15,-248\(%r13\)\+\+
+ 84: ff ff d0 2d fst.l %f16,-4\(%r14\)\+\+
+ 88: 02 28 00 28 fst.l %f0,%r5\(%r0\)
+ 8c: 02 30 3f 28 fst.l %f31,%r6\(%r1\)
+ 90: 02 38 5e 28 fst.l %f30,%r7\(%sp\)
+ 94: 02 40 7d 28 fst.l %f29,%r8\(%fp\)
+ 98: 02 48 9c 28 fst.l %f28,%r9\(%r4\)
+ 9c: 02 00 bb 28 fst.l %f27,%r0\(%r5\)
+ a0: 02 08 da 28 fst.l %f26,%r1\(%r6\)
+ a4: 02 60 f9 28 fst.l %f25,%r12\(%r7\)
+ a8: 02 68 18 29 fst.l %f24,%r13\(%r8\)
+ ac: 02 70 37 29 fst.l %f23,%r14\(%r9\)
+ b0: 02 78 56 29 fst.l %f22,%r15\(%r10\)
+ b4: 02 80 75 29 fst.l %f21,%r16\(%r11\)
+ b8: 02 88 94 29 fst.l %f20,%r17\(%r12\)
+ bc: 02 e0 b3 29 fst.l %f19,%r28\(%r13\)
+ c0: 02 f8 d2 29 fst.l %f18,%r31\(%r14\)
+ c4: 03 28 00 28 fst.l %f0,%r5\(%r0\)\+\+
+ c8: 03 30 21 28 fst.l %f1,%r6\(%r1\)\+\+
+ cc: 03 38 42 28 fst.l %f2,%r7\(%sp\)\+\+
+ d0: 03 40 63 28 fst.l %f3,%r8\(%fp\)\+\+
+ d4: 03 48 84 28 fst.l %f4,%r9\(%r4\)\+\+
+ d8: 03 00 a5 28 fst.l %f5,%r0\(%r5\)\+\+
+ dc: 03 08 c6 28 fst.l %f6,%r1\(%r6\)\+\+
+ e0: 03 60 e7 28 fst.l %f7,%r12\(%r7\)\+\+
+ e4: 03 68 08 29 fst.l %f8,%r13\(%r8\)\+\+
+ e8: 03 70 29 29 fst.l %f9,%r14\(%r9\)\+\+
+ ec: 03 78 4a 29 fst.l %f10,%r15\(%r10\)\+\+
+ f0: 03 80 6b 29 fst.l %f11,%r16\(%r11\)\+\+
+ f4: 03 88 8c 29 fst.l %f12,%r17\(%r12\)\+\+
+ f8: 03 e0 ad 29 fst.l %f13,%r28\(%r13\)\+\+
+ fc: 03 f8 ce 29 fst.l %f14,%r31\(%r14\)\+\+
--- /dev/null
+# fst.l (no relocations here)
+ .text
+
+ # Immediate form, no auto-increment.
+ fst.l %f0,0(%r0)
+ fst.l %f31,124(%r1)
+ fst.l %f30,256(%r2)
+ fst.l %f29,512(%r3)
+ fst.l %f28,1024(%r4)
+ fst.l %f27,4096(%r5)
+ fst.l %f26,8192(%r6)
+ fst.l %f25,16384(%r7)
+ fst.l %f25,32764(%r7)
+ fst.l %f23,-32768(%r7)
+ fst.l %f2,-16384(%r8)
+ fst.l %f3,-8192(%r9)
+ fst.l %f8,-4096(%r10)
+ fst.l %f9,-1024(%r11)
+ fst.l %f12,-508(%r12)
+ fst.l %f19,-248(%r13)
+ fst.l %f21,-4(%r14)
+
+ # Immediate form, with auto-increment.
+ fst.l %f0,0(%r0)++
+ fst.l %f1,124(%r1)++
+ fst.l %f2,256(%r2)++
+ fst.l %f3,512(%r3)++
+ fst.l %f4,1024(%r4)++
+ fst.l %f5,4096(%r5)++
+ fst.l %f6,8192(%r6)++
+ fst.l %f7,16384(%r7)++
+ fst.l %f8,32764(%r7)++
+ fst.l %f9,-32768(%r7)++
+ fst.l %f10,-16384(%r8)++
+ fst.l %f11,-8192(%r9)++
+ fst.l %f12,-4096(%r10)++
+ fst.l %f13,-1024(%r11)++
+ fst.l %f14,-508(%r12)++
+ fst.l %f15,-248(%r13)++
+ fst.l %f16,-4(%r14)++
+
+ # Index form, no auto-increment.
+ fst.l %f0,%r5(%r0)
+ fst.l %f31,%r6(%r1)
+ fst.l %f30,%r7(%r2)
+ fst.l %f29,%r8(%r3)
+ fst.l %f28,%r9(%r4)
+ fst.l %f27,%r0(%r5)
+ fst.l %f26,%r1(%r6)
+ fst.l %f25,%r12(%r7)
+ fst.l %f24,%r13(%r8)
+ fst.l %f23,%r14(%r9)
+ fst.l %f22,%r15(%r10)
+ fst.l %f21,%r16(%r11)
+ fst.l %f20,%r17(%r12)
+ fst.l %f19,%r28(%r13)
+ fst.l %f18,%r31(%r14)
+
+ # Index form, with auto-increment.
+ fst.l %f0,%r5(%r0)++
+ fst.l %f1,%r6(%r1)++
+ fst.l %f2,%r7(%r2)++
+ fst.l %f3,%r8(%r3)++
+ fst.l %f4,%r9(%r4)++
+ fst.l %f5,%r0(%r5)++
+ fst.l %f6,%r1(%r6)++
+ fst.l %f7,%r12(%r7)++
+ fst.l %f8,%r13(%r8)++
+ fst.l %f9,%r14(%r9)++
+ fst.l %f10,%r15(%r10)++
+ fst.l %f11,%r16(%r11)++
+ fst.l %f12,%r17(%r12)++
+ fst.l %f13,%r28(%r13)++
+ fst.l %f14,%r31(%r14)++
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: fldst05 (fst.d)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 00 2c fst.d %f0,0\(%r0\)
+ 4: 80 00 3e 2c fst.d %f30,128\(%r1\)
+ 8: 00 01 5c 2c fst.d %f28,256\(%sp\)
+ c: 00 02 7a 2c fst.d %f26,512\(%fp\)
+ 10: 00 04 98 2c fst.d %f24,1024\(%r4\)
+ 14: 00 10 b6 2c fst.d %f22,4096\(%r5\)
+ 18: 00 20 d4 2c fst.d %f20,8192\(%r6\)
+ 1c: 00 40 f2 2c fst.d %f18,16384\(%r7\)
+ 20: f8 7f f0 2c fst.d %f16,32760\(%r7\)
+ 24: 00 80 ee 2c fst.d %f14,-32768\(%r7\)
+ 28: 00 c0 0c 2d fst.d %f12,-16384\(%r8\)
+ 2c: 00 e0 2a 2d fst.d %f10,-8192\(%r9\)
+ 30: 00 f0 48 2d fst.d %f8,-4096\(%r10\)
+ 34: 00 fc 66 2d fst.d %f6,-1024\(%r11\)
+ 38: 00 fe 84 2d fst.d %f4,-512\(%r12\)
+ 3c: 08 ff a2 2d fst.d %f2,-248\(%r13\)
+ 40: f8 ff c0 2d fst.d %f0,-8\(%r14\)
+ 44: 01 00 00 2c fst.d %f0,0\(%r0\)\+\+
+ 48: 81 00 22 2c fst.d %f2,128\(%r1\)\+\+
+ 4c: 01 01 44 2c fst.d %f4,256\(%sp\)\+\+
+ 50: 01 02 66 2c fst.d %f6,512\(%fp\)\+\+
+ 54: 01 04 88 2c fst.d %f8,1024\(%r4\)\+\+
+ 58: 01 10 aa 2c fst.d %f10,4096\(%r5\)\+\+
+ 5c: 01 20 cc 2c fst.d %f12,8192\(%r6\)\+\+
+ 60: 01 40 ee 2c fst.d %f14,16384\(%r7\)\+\+
+ 64: f9 7f f0 2c fst.d %f16,32760\(%r7\)\+\+
+ 68: 01 80 f2 2c fst.d %f18,-32768\(%r7\)\+\+
+ 6c: 01 c0 14 2d fst.d %f20,-16384\(%r8\)\+\+
+ 70: 01 e0 36 2d fst.d %f22,-8192\(%r9\)\+\+
+ 74: 01 f0 58 2d fst.d %f24,-4096\(%r10\)\+\+
+ 78: 01 fc 7a 2d fst.d %f26,-1024\(%r11\)\+\+
+ 7c: 01 fe 9c 2d fst.d %f28,-512\(%r12\)\+\+
+ 80: 09 ff be 2d fst.d %f30,-248\(%r13\)\+\+
+ 84: f9 ff d0 2d fst.d %f16,-8\(%r14\)\+\+
+ 88: 00 28 00 28 fst.d %f0,%r5\(%r0\)
+ 8c: 00 30 3e 28 fst.d %f30,%r6\(%r1\)
+ 90: 00 38 5c 28 fst.d %f28,%r7\(%sp\)
+ 94: 00 40 7a 28 fst.d %f26,%r8\(%fp\)
+ 98: 00 48 98 28 fst.d %f24,%r9\(%r4\)
+ 9c: 00 00 b6 28 fst.d %f22,%r0\(%r5\)
+ a0: 00 08 d4 28 fst.d %f20,%r1\(%r6\)
+ a4: 00 60 f2 28 fst.d %f18,%r12\(%r7\)
+ a8: 00 68 10 29 fst.d %f16,%r13\(%r8\)
+ ac: 00 70 2e 29 fst.d %f14,%r14\(%r9\)
+ b0: 00 78 4c 29 fst.d %f12,%r15\(%r10\)
+ b4: 00 80 6a 29 fst.d %f10,%r16\(%r11\)
+ b8: 00 88 88 29 fst.d %f8,%r17\(%r12\)
+ bc: 00 e0 a6 29 fst.d %f6,%r28\(%r13\)
+ c0: 00 f8 c4 29 fst.d %f4,%r31\(%r14\)
+ c4: 01 28 00 28 fst.d %f0,%r5\(%r0\)\+\+
+ c8: 01 30 22 28 fst.d %f2,%r6\(%r1\)\+\+
+ cc: 01 38 44 28 fst.d %f4,%r7\(%sp\)\+\+
+ d0: 01 40 66 28 fst.d %f6,%r8\(%fp\)\+\+
+ d4: 01 48 88 28 fst.d %f8,%r9\(%r4\)\+\+
+ d8: 01 00 aa 28 fst.d %f10,%r0\(%r5\)\+\+
+ dc: 01 08 cc 28 fst.d %f12,%r1\(%r6\)\+\+
+ e0: 01 60 ee 28 fst.d %f14,%r12\(%r7\)\+\+
+ e4: 01 68 10 29 fst.d %f16,%r13\(%r8\)\+\+
+ e8: 01 70 32 29 fst.d %f18,%r14\(%r9\)\+\+
+ ec: 01 78 54 29 fst.d %f20,%r15\(%r10\)\+\+
+ f0: 01 80 76 29 fst.d %f22,%r16\(%r11\)\+\+
+ f4: 01 88 98 29 fst.d %f24,%r17\(%r12\)\+\+
+ f8: 01 e0 ba 29 fst.d %f26,%r28\(%r13\)\+\+
+ fc: 01 f8 de 29 fst.d %f30,%r31\(%r14\)\+\+
--- /dev/null
+# fst.d (no relocations here)
+ .text
+
+ # Immediate form, no auto-increment.
+ fst.d %f0,0(%r0)
+ fst.d %f30,128(%r1)
+ fst.d %f28,256(%r2)
+ fst.d %f26,512(%r3)
+ fst.d %f24,1024(%r4)
+ fst.d %f22,4096(%r5)
+ fst.d %f20,8192(%r6)
+ fst.d %f18,16384(%r7)
+ fst.d %f16,32760(%r7)
+ fst.d %f14,-32768(%r7)
+ fst.d %f12,-16384(%r8)
+ fst.d %f10,-8192(%r9)
+ fst.d %f8,-4096(%r10)
+ fst.d %f6,-1024(%r11)
+ fst.d %f4,-512(%r12)
+ fst.d %f2,-248(%r13)
+ fst.d %f0,-8(%r14)
+
+ # Immediate form, with auto-increment.
+ fst.d %f0,0(%r0)++
+ fst.d %f2,128(%r1)++
+ fst.d %f4,256(%r2)++
+ fst.d %f6,512(%r3)++
+ fst.d %f8,1024(%r4)++
+ fst.d %f10,4096(%r5)++
+ fst.d %f12,8192(%r6)++
+ fst.d %f14,16384(%r7)++
+ fst.d %f16,32760(%r7)++
+ fst.d %f18,-32768(%r7)++
+ fst.d %f20,-16384(%r8)++
+ fst.d %f22,-8192(%r9)++
+ fst.d %f24,-4096(%r10)++
+ fst.d %f26,-1024(%r11)++
+ fst.d %f28,-512(%r12)++
+ fst.d %f30,-248(%r13)++
+ fst.d %f16,-8(%r14)++
+
+ # Index form, no auto-increment.
+ fst.d %f0,%r5(%r0)
+ fst.d %f30,%r6(%r1)
+ fst.d %f28,%r7(%r2)
+ fst.d %f26,%r8(%r3)
+ fst.d %f24,%r9(%r4)
+ fst.d %f22,%r0(%r5)
+ fst.d %f20,%r1(%r6)
+ fst.d %f18,%r12(%r7)
+ fst.d %f16,%r13(%r8)
+ fst.d %f14,%r14(%r9)
+ fst.d %f12,%r15(%r10)
+ fst.d %f10,%r16(%r11)
+ fst.d %f8,%r17(%r12)
+ fst.d %f6,%r28(%r13)
+ fst.d %f4,%r31(%r14)
+
+ # Index form, with auto-increment.
+ fst.d %f0,%r5(%r0)++
+ fst.d %f2,%r6(%r1)++
+ fst.d %f4,%r7(%r2)++
+ fst.d %f6,%r8(%r3)++
+ fst.d %f8,%r9(%r4)++
+ fst.d %f10,%r0(%r5)++
+ fst.d %f12,%r1(%r6)++
+ fst.d %f14,%r12(%r7)++
+ fst.d %f16,%r13(%r8)++
+ fst.d %f18,%r14(%r9)++
+ fst.d %f20,%r15(%r10)++
+ fst.d %f22,%r16(%r11)++
+ fst.d %f24,%r17(%r12)++
+ fst.d %f26,%r28(%r13)++
+ fst.d %f30,%r31(%r14)++
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: fldst06 (fst.q)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 04 00 00 2c fst.q %f0,0\(%r0\)
+ 4: 84 00 3c 2c fst.q %f28,128\(%r1\)
+ 8: 04 01 58 2c fst.q %f24,256\(%sp\)
+ c: 04 02 74 2c fst.q %f20,512\(%fp\)
+ 10: 04 04 90 2c fst.q %f16,1024\(%r4\)
+ 14: 04 10 ac 2c fst.q %f12,4096\(%r5\)
+ 18: 04 20 c8 2c fst.q %f8,8192\(%r6\)
+ 1c: 04 40 e4 2c fst.q %f4,16384\(%r7\)
+ 20: f4 7f e0 2c fst.q %f0,32752\(%r7\)
+ 24: 04 80 fc 2c fst.q %f28,-32768\(%r7\)
+ 28: 04 c0 18 2d fst.q %f24,-16384\(%r8\)
+ 2c: 04 e0 34 2d fst.q %f20,-8192\(%r9\)
+ 30: 04 f0 50 2d fst.q %f16,-4096\(%r10\)
+ 34: 04 fc 6c 2d fst.q %f12,-1024\(%r11\)
+ 38: 04 fe 88 2d fst.q %f8,-512\(%r12\)
+ 3c: 04 ff a4 2d fst.q %f4,-256\(%r13\)
+ 40: f4 ff c0 2d fst.q %f0,-16\(%r14\)
+ 44: 05 00 00 2c fst.q %f0,0\(%r0\)\+\+
+ 48: 85 00 24 2c fst.q %f4,128\(%r1\)\+\+
+ 4c: 05 01 48 2c fst.q %f8,256\(%sp\)\+\+
+ 50: 05 02 6c 2c fst.q %f12,512\(%fp\)\+\+
+ 54: 05 04 90 2c fst.q %f16,1024\(%r4\)\+\+
+ 58: 05 10 b4 2c fst.q %f20,4096\(%r5\)\+\+
+ 5c: 05 20 d8 2c fst.q %f24,8192\(%r6\)\+\+
+ 60: 05 40 fc 2c fst.q %f28,16384\(%r7\)\+\+
+ 64: f5 7f e0 2c fst.q %f0,32752\(%r7\)\+\+
+ 68: 05 80 e4 2c fst.q %f4,-32768\(%r7\)\+\+
+ 6c: 05 c0 08 2d fst.q %f8,-16384\(%r8\)\+\+
+ 70: 05 e0 2c 2d fst.q %f12,-8192\(%r9\)\+\+
+ 74: 05 f0 50 2d fst.q %f16,-4096\(%r10\)\+\+
+ 78: 05 fc 74 2d fst.q %f20,-1024\(%r11\)\+\+
+ 7c: 05 fe 98 2d fst.q %f24,-512\(%r12\)\+\+
+ 80: 05 ff bc 2d fst.q %f28,-256\(%r13\)\+\+
+ 84: f5 ff d0 2d fst.q %f16,-16\(%r14\)\+\+
+ 88: 04 28 00 28 fst.q %f0,%r5\(%r0\)
+ 8c: 04 30 34 28 fst.q %f20,%r6\(%r1\)
+ 90: 04 38 50 28 fst.q %f16,%r7\(%sp\)
+ 94: 04 40 6c 28 fst.q %f12,%r8\(%fp\)
+ 98: 04 48 88 28 fst.q %f8,%r9\(%r4\)
+ 9c: 04 00 a4 28 fst.q %f4,%r0\(%r5\)
+ a0: 04 08 c0 28 fst.q %f0,%r1\(%r6\)
+ a4: 04 60 fc 28 fst.q %f28,%r12\(%r7\)
+ a8: 04 68 18 29 fst.q %f24,%r13\(%r8\)
+ ac: 04 70 34 29 fst.q %f20,%r14\(%r9\)
+ b0: 04 78 50 29 fst.q %f16,%r15\(%r10\)
+ b4: 04 80 6c 29 fst.q %f12,%r16\(%r11\)
+ b8: 04 88 88 29 fst.q %f8,%r17\(%r12\)
+ bc: 04 e0 a4 29 fst.q %f4,%r28\(%r13\)
+ c0: 04 f8 c0 29 fst.q %f0,%r31\(%r14\)
+ c4: 05 28 00 28 fst.q %f0,%r5\(%r0\)\+\+
+ c8: 05 30 24 28 fst.q %f4,%r6\(%r1\)\+\+
+ cc: 05 38 48 28 fst.q %f8,%r7\(%sp\)\+\+
+ d0: 05 40 6c 28 fst.q %f12,%r8\(%fp\)\+\+
+ d4: 05 48 90 28 fst.q %f16,%r9\(%r4\)\+\+
+ d8: 05 00 b4 28 fst.q %f20,%r0\(%r5\)\+\+
+ dc: 05 08 d8 28 fst.q %f24,%r1\(%r6\)\+\+
+ e0: 05 60 fc 28 fst.q %f28,%r12\(%r7\)\+\+
+ e4: 05 68 00 29 fst.q %f0,%r13\(%r8\)\+\+
+ e8: 05 70 24 29 fst.q %f4,%r14\(%r9\)\+\+
+ ec: 05 78 48 29 fst.q %f8,%r15\(%r10\)\+\+
+ f0: 05 80 6c 29 fst.q %f12,%r16\(%r11\)\+\+
+ f4: 05 88 90 29 fst.q %f16,%r17\(%r12\)\+\+
+ f8: 05 e0 b4 29 fst.q %f20,%r28\(%r13\)\+\+
+ fc: 05 f8 d8 29 fst.q %f24,%r31\(%r14\)\+\+
--- /dev/null
+# fst.q (no relocations here)
+ .text
+
+ # Immediate form, no auto-increment.
+ fst.q %f0,0(%r0)
+ fst.q %f28,128(%r1)
+ fst.q %f24,256(%r2)
+ fst.q %f20,512(%r3)
+ fst.q %f16,1024(%r4)
+ fst.q %f12,4096(%r5)
+ fst.q %f8,8192(%r6)
+ fst.q %f4,16384(%r7)
+ fst.q %f0,32752(%r7)
+ fst.q %f28,-32768(%r7)
+ fst.q %f24,-16384(%r8)
+ fst.q %f20,-8192(%r9)
+ fst.q %f16,-4096(%r10)
+ fst.q %f12,-1024(%r11)
+ fst.q %f8,-512(%r12)
+ fst.q %f4,-256(%r13)
+ fst.q %f0,-16(%r14)
+
+ # Immediate form, with auto-increment.
+ fst.q %f0,0(%r0)++
+ fst.q %f4,128(%r1)++
+ fst.q %f8,256(%r2)++
+ fst.q %f12,512(%r3)++
+ fst.q %f16,1024(%r4)++
+ fst.q %f20,4096(%r5)++
+ fst.q %f24,8192(%r6)++
+ fst.q %f28,16384(%r7)++
+ fst.q %f0,32752(%r7)++
+ fst.q %f4,-32768(%r7)++
+ fst.q %f8,-16384(%r8)++
+ fst.q %f12,-8192(%r9)++
+ fst.q %f16,-4096(%r10)++
+ fst.q %f20,-1024(%r11)++
+ fst.q %f24,-512(%r12)++
+ fst.q %f28,-256(%r13)++
+ fst.q %f16,-16(%r14)++
+
+ # Index form, no auto-increment.
+ fst.q %f0,%r5(%r0)
+ fst.q %f20,%r6(%r1)
+ fst.q %f16,%r7(%r2)
+ fst.q %f12,%r8(%r3)
+ fst.q %f8,%r9(%r4)
+ fst.q %f4,%r0(%r5)
+ fst.q %f0,%r1(%r6)
+ fst.q %f28,%r12(%r7)
+ fst.q %f24,%r13(%r8)
+ fst.q %f20,%r14(%r9)
+ fst.q %f16,%r15(%r10)
+ fst.q %f12,%r16(%r11)
+ fst.q %f8,%r17(%r12)
+ fst.q %f4,%r28(%r13)
+ fst.q %f0,%r31(%r14)
+
+ # Index form, with auto-increment.
+ fst.q %f0,%r5(%r0)++
+ fst.q %f4,%r6(%r1)++
+ fst.q %f8,%r7(%r2)++
+ fst.q %f12,%r8(%r3)++
+ fst.q %f16,%r9(%r4)++
+ fst.q %f20,%r0(%r5)++
+ fst.q %f24,%r1(%r6)++
+ fst.q %f28,%r12(%r7)++
+ fst.q %f0,%r13(%r8)++
+ fst.q %f4,%r14(%r9)++
+ fst.q %f8,%r15(%r10)++
+ fst.q %f12,%r16(%r11)++
+ fst.q %f16,%r17(%r12)++
+ fst.q %f20,%r28(%r13)++
+ fst.q %f24,%r31(%r14)++
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: fldst07 (pfld.l)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 02 00 00 64 pfld.l 0\(%r0\),%f0
+ 4: 7e 00 3f 64 pfld.l 124\(%r1\),%f31
+ 8: 02 01 5e 64 pfld.l 256\(%sp\),%f30
+ c: 02 02 7d 64 pfld.l 512\(%fp\),%f29
+ 10: 02 04 9c 64 pfld.l 1024\(%r4\),%f28
+ 14: 02 10 bb 64 pfld.l 4096\(%r5\),%f27
+ 18: 02 20 da 64 pfld.l 8192\(%r6\),%f26
+ 1c: 02 40 f9 64 pfld.l 16384\(%r7\),%f25
+ 20: fe 7f f9 64 pfld.l 32764\(%r7\),%f25
+ 24: 02 80 f7 64 pfld.l -32768\(%r7\),%f23
+ 28: 02 c0 02 65 pfld.l -16384\(%r8\),%f2
+ 2c: 02 e0 23 65 pfld.l -8192\(%r9\),%f3
+ 30: 02 f0 48 65 pfld.l -4096\(%r10\),%f8
+ 34: 02 fc 69 65 pfld.l -1024\(%r11\),%f9
+ 38: 06 fe 8c 65 pfld.l -508\(%r12\),%f12
+ 3c: 0a ff b3 65 pfld.l -248\(%r13\),%f19
+ 40: fe ff d5 65 pfld.l -4\(%r14\),%f21
+ 44: 03 00 00 64 pfld.l 0\(%r0\)\+\+,%f0
+ 48: 7f 00 21 64 pfld.l 124\(%r1\)\+\+,%f1
+ 4c: 03 01 42 64 pfld.l 256\(%sp\)\+\+,%f2
+ 50: 03 02 63 64 pfld.l 512\(%fp\)\+\+,%f3
+ 54: 03 04 84 64 pfld.l 1024\(%r4\)\+\+,%f4
+ 58: 03 10 a5 64 pfld.l 4096\(%r5\)\+\+,%f5
+ 5c: 03 20 c6 64 pfld.l 8192\(%r6\)\+\+,%f6
+ 60: 03 40 e7 64 pfld.l 16384\(%r7\)\+\+,%f7
+ 64: ff 7f e8 64 pfld.l 32764\(%r7\)\+\+,%f8
+ 68: 03 80 e9 64 pfld.l -32768\(%r7\)\+\+,%f9
+ 6c: 03 c0 0a 65 pfld.l -16384\(%r8\)\+\+,%f10
+ 70: 03 e0 2b 65 pfld.l -8192\(%r9\)\+\+,%f11
+ 74: 03 f0 4c 65 pfld.l -4096\(%r10\)\+\+,%f12
+ 78: 03 fc 6d 65 pfld.l -1024\(%r11\)\+\+,%f13
+ 7c: 07 fe 8e 65 pfld.l -508\(%r12\)\+\+,%f14
+ 80: 0b ff af 65 pfld.l -248\(%r13\)\+\+,%f15
+ 84: ff ff d0 65 pfld.l -4\(%r14\)\+\+,%f16
+ 88: 02 28 00 60 pfld.l %r5\(%r0\),%f0
+ 8c: 02 30 3f 60 pfld.l %r6\(%r1\),%f31
+ 90: 02 38 5e 60 pfld.l %r7\(%sp\),%f30
+ 94: 02 40 7d 60 pfld.l %r8\(%fp\),%f29
+ 98: 02 48 9c 60 pfld.l %r9\(%r4\),%f28
+ 9c: 02 00 bb 60 pfld.l %r0\(%r5\),%f27
+ a0: 02 08 da 60 pfld.l %r1\(%r6\),%f26
+ a4: 02 60 f9 60 pfld.l %r12\(%r7\),%f25
+ a8: 02 68 18 61 pfld.l %r13\(%r8\),%f24
+ ac: 02 70 37 61 pfld.l %r14\(%r9\),%f23
+ b0: 02 78 56 61 pfld.l %r15\(%r10\),%f22
+ b4: 02 80 75 61 pfld.l %r16\(%r11\),%f21
+ b8: 02 88 94 61 pfld.l %r17\(%r12\),%f20
+ bc: 02 e0 b3 61 pfld.l %r28\(%r13\),%f19
+ c0: 02 f8 d2 61 pfld.l %r31\(%r14\),%f18
+ c4: 03 28 00 60 pfld.l %r5\(%r0\)\+\+,%f0
+ c8: 03 30 21 60 pfld.l %r6\(%r1\)\+\+,%f1
+ cc: 03 38 42 60 pfld.l %r7\(%sp\)\+\+,%f2
+ d0: 03 40 63 60 pfld.l %r8\(%fp\)\+\+,%f3
+ d4: 03 48 84 60 pfld.l %r9\(%r4\)\+\+,%f4
+ d8: 03 00 a5 60 pfld.l %r0\(%r5\)\+\+,%f5
+ dc: 03 08 c6 60 pfld.l %r1\(%r6\)\+\+,%f6
+ e0: 03 60 e7 60 pfld.l %r12\(%r7\)\+\+,%f7
+ e4: 03 68 08 61 pfld.l %r13\(%r8\)\+\+,%f8
+ e8: 03 70 29 61 pfld.l %r14\(%r9\)\+\+,%f9
+ ec: 03 78 4a 61 pfld.l %r15\(%r10\)\+\+,%f10
+ f0: 03 80 6b 61 pfld.l %r16\(%r11\)\+\+,%f11
+ f4: 03 88 8c 61 pfld.l %r17\(%r12\)\+\+,%f12
+ f8: 03 e0 ad 61 pfld.l %r28\(%r13\)\+\+,%f13
+ fc: 03 f8 ce 61 pfld.l %r31\(%r14\)\+\+,%f14
--- /dev/null
+# pfld.l (no relocations here)
+ .text
+
+ # Immediate form, no auto-increment.
+ pfld.l 0(%r0),%f0
+ pfld.l 124(%r1),%f31
+ pfld.l 256(%r2),%f30
+ pfld.l 512(%r3),%f29
+ pfld.l 1024(%r4),%f28
+ pfld.l 4096(%r5),%f27
+ pfld.l 8192(%r6),%f26
+ pfld.l 16384(%r7),%f25
+ pfld.l 32764(%r7),%f25
+ pfld.l -32768(%r7),%f23
+ pfld.l -16384(%r8),%f2
+ pfld.l -8192(%r9),%f3
+ pfld.l -4096(%r10),%f8
+ pfld.l -1024(%r11),%f9
+ pfld.l -508(%r12),%f12
+ pfld.l -248(%r13),%f19
+ pfld.l -4(%r14),%f21
+
+ # Immediate form, with auto-increment.
+ pfld.l 0(%r0)++,%f0
+ pfld.l 124(%r1)++,%f1
+ pfld.l 256(%r2)++,%f2
+ pfld.l 512(%r3)++,%f3
+ pfld.l 1024(%r4)++,%f4
+ pfld.l 4096(%r5)++,%f5
+ pfld.l 8192(%r6)++,%f6
+ pfld.l 16384(%r7)++,%f7
+ pfld.l 32764(%r7)++,%f8
+ pfld.l -32768(%r7)++,%f9
+ pfld.l -16384(%r8)++,%f10
+ pfld.l -8192(%r9)++,%f11
+ pfld.l -4096(%r10)++,%f12
+ pfld.l -1024(%r11)++,%f13
+ pfld.l -508(%r12)++,%f14
+ pfld.l -248(%r13)++,%f15
+ pfld.l -4(%r14)++,%f16
+
+ # Index form, no auto-increment.
+ pfld.l %r5(%r0),%f0
+ pfld.l %r6(%r1),%f31
+ pfld.l %r7(%r2),%f30
+ pfld.l %r8(%r3),%f29
+ pfld.l %r9(%r4),%f28
+ pfld.l %r0(%r5),%f27
+ pfld.l %r1(%r6),%f26
+ pfld.l %r12(%r7),%f25
+ pfld.l %r13(%r8),%f24
+ pfld.l %r14(%r9),%f23
+ pfld.l %r15(%r10),%f22
+ pfld.l %r16(%r11),%f21
+ pfld.l %r17(%r12),%f20
+ pfld.l %r28(%r13),%f19
+ pfld.l %r31(%r14),%f18
+
+ # Index form, with auto-increment.
+ pfld.l %r5(%r0)++,%f0
+ pfld.l %r6(%r1)++,%f1
+ pfld.l %r7(%r2)++,%f2
+ pfld.l %r8(%r3)++,%f3
+ pfld.l %r9(%r4)++,%f4
+ pfld.l %r0(%r5)++,%f5
+ pfld.l %r1(%r6)++,%f6
+ pfld.l %r12(%r7)++,%f7
+ pfld.l %r13(%r8)++,%f8
+ pfld.l %r14(%r9)++,%f9
+ pfld.l %r15(%r10)++,%f10
+ pfld.l %r16(%r11)++,%f11
+ pfld.l %r17(%r12)++,%f12
+ pfld.l %r28(%r13)++,%f13
+ pfld.l %r31(%r14)++,%f14
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: fldst08 (pfld.d)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 00 64 pfld.d 0\(%r0\),%f0
+ 4: 80 00 3e 64 pfld.d 128\(%r1\),%f30
+ 8: 00 01 5c 64 pfld.d 256\(%sp\),%f28
+ c: 00 02 7a 64 pfld.d 512\(%fp\),%f26
+ 10: 00 04 98 64 pfld.d 1024\(%r4\),%f24
+ 14: 00 10 b6 64 pfld.d 4096\(%r5\),%f22
+ 18: 00 20 d4 64 pfld.d 8192\(%r6\),%f20
+ 1c: 00 40 f2 64 pfld.d 16384\(%r7\),%f18
+ 20: f8 7f f0 64 pfld.d 32760\(%r7\),%f16
+ 24: 00 80 ee 64 pfld.d -32768\(%r7\),%f14
+ 28: 00 c0 0c 65 pfld.d -16384\(%r8\),%f12
+ 2c: 00 e0 2a 65 pfld.d -8192\(%r9\),%f10
+ 30: 00 f0 48 65 pfld.d -4096\(%r10\),%f8
+ 34: 00 fc 66 65 pfld.d -1024\(%r11\),%f6
+ 38: 00 fe 84 65 pfld.d -512\(%r12\),%f4
+ 3c: 08 ff a2 65 pfld.d -248\(%r13\),%f2
+ 40: f8 ff c0 65 pfld.d -8\(%r14\),%f0
+ 44: 01 00 00 64 pfld.d 0\(%r0\)\+\+,%f0
+ 48: 81 00 22 64 pfld.d 128\(%r1\)\+\+,%f2
+ 4c: 01 01 44 64 pfld.d 256\(%sp\)\+\+,%f4
+ 50: 01 02 66 64 pfld.d 512\(%fp\)\+\+,%f6
+ 54: 01 04 88 64 pfld.d 1024\(%r4\)\+\+,%f8
+ 58: 01 10 aa 64 pfld.d 4096\(%r5\)\+\+,%f10
+ 5c: 01 20 cc 64 pfld.d 8192\(%r6\)\+\+,%f12
+ 60: 01 40 ee 64 pfld.d 16384\(%r7\)\+\+,%f14
+ 64: f9 7f f0 64 pfld.d 32760\(%r7\)\+\+,%f16
+ 68: 01 80 f2 64 pfld.d -32768\(%r7\)\+\+,%f18
+ 6c: 01 c0 14 65 pfld.d -16384\(%r8\)\+\+,%f20
+ 70: 01 e0 36 65 pfld.d -8192\(%r9\)\+\+,%f22
+ 74: 01 f0 58 65 pfld.d -4096\(%r10\)\+\+,%f24
+ 78: 01 fc 7a 65 pfld.d -1024\(%r11\)\+\+,%f26
+ 7c: 01 fe 9c 65 pfld.d -512\(%r12\)\+\+,%f28
+ 80: 09 ff be 65 pfld.d -248\(%r13\)\+\+,%f30
+ 84: f9 ff d0 65 pfld.d -8\(%r14\)\+\+,%f16
+ 88: 00 28 00 60 pfld.d %r5\(%r0\),%f0
+ 8c: 00 30 3e 60 pfld.d %r6\(%r1\),%f30
+ 90: 00 38 5c 60 pfld.d %r7\(%sp\),%f28
+ 94: 00 40 7a 60 pfld.d %r8\(%fp\),%f26
+ 98: 00 48 98 60 pfld.d %r9\(%r4\),%f24
+ 9c: 00 00 b6 60 pfld.d %r0\(%r5\),%f22
+ a0: 00 08 d4 60 pfld.d %r1\(%r6\),%f20
+ a4: 00 60 f2 60 pfld.d %r12\(%r7\),%f18
+ a8: 00 68 10 61 pfld.d %r13\(%r8\),%f16
+ ac: 00 70 2e 61 pfld.d %r14\(%r9\),%f14
+ b0: 00 78 4c 61 pfld.d %r15\(%r10\),%f12
+ b4: 00 80 6a 61 pfld.d %r16\(%r11\),%f10
+ b8: 00 88 88 61 pfld.d %r17\(%r12\),%f8
+ bc: 00 e0 a6 61 pfld.d %r28\(%r13\),%f6
+ c0: 00 f8 c4 61 pfld.d %r31\(%r14\),%f4
+ c4: 01 28 00 60 pfld.d %r5\(%r0\)\+\+,%f0
+ c8: 01 30 22 60 pfld.d %r6\(%r1\)\+\+,%f2
+ cc: 01 38 44 60 pfld.d %r7\(%sp\)\+\+,%f4
+ d0: 01 40 66 60 pfld.d %r8\(%fp\)\+\+,%f6
+ d4: 01 48 88 60 pfld.d %r9\(%r4\)\+\+,%f8
+ d8: 01 00 aa 60 pfld.d %r0\(%r5\)\+\+,%f10
+ dc: 01 08 cc 60 pfld.d %r1\(%r6\)\+\+,%f12
+ e0: 01 60 ee 60 pfld.d %r12\(%r7\)\+\+,%f14
+ e4: 01 68 10 61 pfld.d %r13\(%r8\)\+\+,%f16
+ e8: 01 70 32 61 pfld.d %r14\(%r9\)\+\+,%f18
+ ec: 01 78 54 61 pfld.d %r15\(%r10\)\+\+,%f20
+ f0: 01 80 76 61 pfld.d %r16\(%r11\)\+\+,%f22
+ f4: 01 88 98 61 pfld.d %r17\(%r12\)\+\+,%f24
+ f8: 01 e0 ba 61 pfld.d %r28\(%r13\)\+\+,%f26
+ fc: 01 f8 de 61 pfld.d %r31\(%r14\)\+\+,%f30
--- /dev/null
+# pfld.d (no relocations here)
+ .text
+
+ # Immediate form, no auto-increment.
+ pfld.d 0(%r0),%f0
+ pfld.d 128(%r1),%f30
+ pfld.d 256(%r2),%f28
+ pfld.d 512(%r3),%f26
+ pfld.d 1024(%r4),%f24
+ pfld.d 4096(%r5),%f22
+ pfld.d 8192(%r6),%f20
+ pfld.d 16384(%r7),%f18
+ pfld.d 32760(%r7),%f16
+ pfld.d -32768(%r7),%f14
+ pfld.d -16384(%r8),%f12
+ pfld.d -8192(%r9),%f10
+ pfld.d -4096(%r10),%f8
+ pfld.d -1024(%r11),%f6
+ pfld.d -512(%r12),%f4
+ pfld.d -248(%r13),%f2
+ pfld.d -8(%r14),%f0
+
+ # Immediate form, with auto-increment.
+ pfld.d 0(%r0)++,%f0
+ pfld.d 128(%r1)++,%f2
+ pfld.d 256(%r2)++,%f4
+ pfld.d 512(%r3)++,%f6
+ pfld.d 1024(%r4)++,%f8
+ pfld.d 4096(%r5)++,%f10
+ pfld.d 8192(%r6)++,%f12
+ pfld.d 16384(%r7)++,%f14
+ pfld.d 32760(%r7)++,%f16
+ pfld.d -32768(%r7)++,%f18
+ pfld.d -16384(%r8)++,%f20
+ pfld.d -8192(%r9)++,%f22
+ pfld.d -4096(%r10)++,%f24
+ pfld.d -1024(%r11)++,%f26
+ pfld.d -512(%r12)++,%f28
+ pfld.d -248(%r13)++,%f30
+ pfld.d -8(%r14)++,%f16
+
+ # Index form, no auto-increment.
+ pfld.d %r5(%r0),%f0
+ pfld.d %r6(%r1),%f30
+ pfld.d %r7(%r2),%f28
+ pfld.d %r8(%r3),%f26
+ pfld.d %r9(%r4),%f24
+ pfld.d %r0(%r5),%f22
+ pfld.d %r1(%r6),%f20
+ pfld.d %r12(%r7),%f18
+ pfld.d %r13(%r8),%f16
+ pfld.d %r14(%r9),%f14
+ pfld.d %r15(%r10),%f12
+ pfld.d %r16(%r11),%f10
+ pfld.d %r17(%r12),%f8
+ pfld.d %r28(%r13),%f6
+ pfld.d %r31(%r14),%f4
+
+ # Index form, with auto-increment.
+ pfld.d %r5(%r0)++,%f0
+ pfld.d %r6(%r1)++,%f2
+ pfld.d %r7(%r2)++,%f4
+ pfld.d %r8(%r3)++,%f6
+ pfld.d %r9(%r4)++,%f8
+ pfld.d %r0(%r5)++,%f10
+ pfld.d %r1(%r6)++,%f12
+ pfld.d %r12(%r7)++,%f14
+ pfld.d %r13(%r8)++,%f16
+ pfld.d %r14(%r9)++,%f18
+ pfld.d %r15(%r10)++,%f20
+ pfld.d %r16(%r11)++,%f22
+ pfld.d %r17(%r12)++,%f24
+ pfld.d %r28(%r13)++,%f26
+ pfld.d %r31(%r14)++,%f30
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: float01
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 30 00 22 48 fadd.ss %f0,%f1,%f2
+ 4: b0 10 64 48 fadd.sd %f2,%f3,%f4
+ 8: b0 31 0a 49 fadd.dd %f6,%f8,%f10
+ c: 31 28 c7 48 fsub.ss %f5,%f6,%f7
+ 10: b1 40 2a 49 fsub.sd %f8,%f9,%f10
+ 14: b1 61 d0 49 fsub.dd %f12,%f14,%f16
+ 18: 20 58 8d 49 fmul.ss %f11,%f12,%f13
+ 1c: a0 70 f0 49 fmul.sd %f14,%f15,%f16
+ 20: a0 91 96 4a fmul.dd %f18,%f20,%f22
+ 24: a1 b1 1a 4b fmlow.dd %f22,%f24,%f26
+ 28: 30 74 f0 49 pfadd.ss %f14,%f15,%f16
+ 2c: b0 8c 54 4a pfadd.sd %f17,%f18,%f20
+ 30: b0 b5 1a 4b pfadd.dd %f22,%f24,%f26
+ 34: 31 a4 b6 4a pfsub.ss %f20,%f21,%f22
+ 38: b1 bc 1a 4b pfsub.sd %f23,%f24,%f26
+ 3c: b1 e5 c2 4b pfsub.dd %f28,%f30,%f2
+ 40: 20 dc 9d 4b pfmul.ss %f27,%f28,%f29
+ 44: a0 f4 e4 4b pfmul.sd %f30,%f31,%f4
+ 48: a0 35 08 48 pfmul.dd %f6,%f0,%f8
+ 4c: a4 15 9e 48 pfmul3.dd %f2,%f4,%f30
+ 50: 30 02 22 48 d.fadd.ss %f0,%f1,%f2
+ 54: 00 00 00 a0 shl %r0,%r0,%r0
+ 58: b0 12 64 48 d.fadd.sd %f2,%f3,%f4
+ 5c: 00 00 00 a0 shl %r0,%r0,%r0
+ 60: b0 33 0a 49 d.fadd.dd %f6,%f8,%f10
+ 64: 00 00 00 a0 shl %r0,%r0,%r0
+ 68: 31 2a c7 48 d.fsub.ss %f5,%f6,%f7
+ 6c: 00 00 00 a0 shl %r0,%r0,%r0
+ 70: b1 42 2a 49 d.fsub.sd %f8,%f9,%f10
+ 74: 00 00 00 a0 shl %r0,%r0,%r0
+ 78: b1 63 d0 49 d.fsub.dd %f12,%f14,%f16
+ 7c: 00 00 00 a0 shl %r0,%r0,%r0
+ 80: 20 5a 8d 49 d.fmul.ss %f11,%f12,%f13
+ 84: 00 00 00 a0 shl %r0,%r0,%r0
+ 88: a0 72 f0 49 d.fmul.sd %f14,%f15,%f16
+ 8c: 00 00 00 a0 shl %r0,%r0,%r0
+ 90: a0 93 96 4a d.fmul.dd %f18,%f20,%f22
+ 94: 00 00 00 a0 shl %r0,%r0,%r0
+ 98: a1 43 4c 49 d.fmlow.dd %f8,%f10,%f12
+ 9c: 00 00 00 a0 shl %r0,%r0,%r0
+ a0: 30 76 f0 49 d.pfadd.ss %f14,%f15,%f16
+ a4: 00 00 00 a0 shl %r0,%r0,%r0
+ a8: b0 8e 54 4a d.pfadd.sd %f17,%f18,%f20
+ ac: 00 00 00 a0 shl %r0,%r0,%r0
+ b0: b0 b7 1a 4b d.pfadd.dd %f22,%f24,%f26
+ b4: 00 00 00 a0 shl %r0,%r0,%r0
+ b8: 31 a6 b6 4a d.pfsub.ss %f20,%f21,%f22
+ bc: 00 00 00 a0 shl %r0,%r0,%r0
+ c0: b1 be 1a 4b d.pfsub.sd %f23,%f24,%f26
+ c4: 00 00 00 a0 shl %r0,%r0,%r0
+ c8: b1 e7 c2 4b d.pfsub.dd %f28,%f30,%f2
+ cc: 00 00 00 a0 shl %r0,%r0,%r0
+ d0: 20 de 9d 4b d.pfmul.ss %f27,%f28,%f29
+ d4: 00 00 00 a0 shl %r0,%r0,%r0
+ d8: a0 f6 e4 4b d.pfmul.sd %f30,%f31,%f4
+ dc: 00 00 00 a0 shl %r0,%r0,%r0
+ e0: a0 37 08 48 d.pfmul.dd %f6,%f0,%f8
+ e4: 00 00 00 a0 shl %r0,%r0,%r0
+ e8: a4 17 9e 48 d.pfmul3.dd %f2,%f4,%f30
+ ec: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# fadd, fsub, fmul, pfmul3, fmlow
+
+ .text
+
+ # Non-pipelined, without dual bit
+ fadd.ss %f0,%f1,%f2
+ fadd.sd %f2,%f3,%f4
+ fadd.dd %f6,%f8,%f10
+
+ fsub.ss %f5,%f6,%f7
+ fsub.sd %f8,%f9,%f10
+ fsub.dd %f12,%f14,%f16
+
+ fmul.ss %f11,%f12,%f13
+ fmul.sd %f14,%f15,%f16
+ fmul.dd %f18,%f20,%f22
+
+ fmlow.dd %f22,%f24,%f26
+
+ # Pipelined, without dual bit
+ pfadd.ss %f14,%f15,%f16
+ pfadd.sd %f17,%f18,%f20
+ pfadd.dd %f22,%f24,%f26
+
+ pfsub.ss %f20,%f21,%f22
+ pfsub.sd %f23,%f24,%f26
+ pfsub.dd %f28,%f30,%f2
+
+ pfmul.ss %f27,%f28,%f29
+ pfmul.sd %f30,%f31,%f4
+ pfmul.dd %f6,%f0,%f8
+
+ pfmul3.dd %f2,%f4,%f30
+
+ # Non-pipelined, with dual bit
+ d.fadd.ss %f0,%f1,%f2
+ nop
+ d.fadd.sd %f2,%f3,%f4
+ nop
+ d.fadd.dd %f6,%f8,%f10
+ nop
+
+ d.fsub.ss %f5,%f6,%f7
+ nop
+ d.fsub.sd %f8,%f9,%f10
+ nop
+ d.fsub.dd %f12,%f14,%f16
+ nop
+
+ d.fmul.ss %f11,%f12,%f13
+ nop
+ d.fmul.sd %f14,%f15,%f16
+ nop
+ d.fmul.dd %f18,%f20,%f22
+ nop
+
+ d.fmlow.dd %f8,%f10,%f12
+ nop
+
+ # Pipelined, with dual bit
+ d.pfadd.ss %f14,%f15,%f16
+ nop
+ d.pfadd.sd %f17,%f18,%f20
+ nop
+ d.pfadd.dd %f22,%f24,%f26
+ nop
+
+ d.pfsub.ss %f20,%f21,%f22
+ nop
+ d.pfsub.sd %f23,%f24,%f26
+ nop
+ d.pfsub.dd %f28,%f30,%f2
+ nop
+
+ d.pfmul.ss %f27,%f28,%f29
+ nop
+ d.pfmul.sd %f30,%f31,%f4
+ nop
+ d.pfmul.dd %f6,%f0,%f8
+ nop
+
+ d.pfmul3.dd %f2,%f4,%f30
+ nop
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: float02
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 22 00 01 48 frcp.ss %f0,%f1
+ 4: a2 00 44 48 frcp.sd %f2,%f4
+ 8: a2 01 c8 48 frcp.dd %f6,%f8
+ c: 23 00 a6 48 frsqr.ss %f5,%f6
+ 10: a3 00 0a 49 frsqr.sd %f8,%f10
+ 14: a3 01 8e 49 frsqr.dd %f12,%f14
+ 18: 33 08 1f 48 famov.ss %f1,%f31
+ 1c: 33 11 1e 48 famov.ds %f2,%f30
+ 20: b3 38 10 48 famov.sd %f7,%f16
+ 24: b3 c1 0c 48 famov.dd %f24,%f12
+ 28: 22 02 01 48 d.frcp.ss %f0,%f1
+ 2c: 00 00 00 a0 shl %r0,%r0,%r0
+ 30: a2 02 5e 48 d.frcp.sd %f2,%f30
+ 34: 00 00 00 a0 shl %r0,%r0,%r0
+ 38: a2 03 c8 48 d.frcp.dd %f6,%f8
+ 3c: 00 00 00 a0 shl %r0,%r0,%r0
+ 40: 23 02 a6 48 d.frsqr.ss %f5,%f6
+ 44: 00 00 00 a0 shl %r0,%r0,%r0
+ 48: a3 02 18 49 d.frsqr.sd %f8,%f24
+ 4c: 00 00 00 a0 shl %r0,%r0,%r0
+ 50: a3 03 8e 49 d.frsqr.dd %f12,%f14
+ 54: 00 00 00 a0 shl %r0,%r0,%r0
+ 58: 33 2a 0d 48 d.famov.ss %f5,%f13
+ 5c: 00 00 00 a0 shl %r0,%r0,%r0
+ 60: 33 f3 15 48 d.famov.ds %f30,%f21
+ 64: 00 00 00 a0 shl %r0,%r0,%r0
+ 68: b3 ba 16 48 d.famov.sd %f23,%f22
+ 6c: 00 00 00 a0 shl %r0,%r0,%r0
+ 70: b3 03 0c 48 d.famov.dd %f0,%f12
+ 74: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# frcp, frsqr, famov
+
+ .text
+
+ # Without dual bit
+ frcp.ss %f0,%f1
+ frcp.sd %f2,%f4
+ frcp.dd %f6,%f8
+
+ frsqr.ss %f5,%f6
+ frsqr.sd %f8,%f10
+ frsqr.dd %f12,%f14
+
+ famov.ss %f1,%f31
+ famov.ds %f2,%f30
+ famov.sd %f7,%f16
+ famov.dd %f24,%f12
+
+ # With dual bit
+ d.frcp.ss %f0,%f1
+ nop
+ d.frcp.sd %f2,%f30
+ nop
+ d.frcp.dd %f6,%f8
+ nop
+
+ d.frsqr.ss %f5,%f6
+ nop
+ d.frsqr.sd %f8,%f24
+ nop
+ d.frsqr.dd %f12,%f14
+ nop
+
+ d.famov.ss %f5,%f13
+ nop
+ d.famov.ds %f30,%f21
+ nop
+ d.famov.sd %f23,%f22
+ nop
+ d.famov.dd %f0,%f12
+ nop
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: float03
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: b2 10 04 48 fix.sd %f2,%f4
+ 4: b2 31 08 48 fix.dd %f6,%f8
+ 8: ba 40 0a 48 ftrunc.sd %f8,%f10
+ c: ba 61 0e 48 ftrunc.dd %f12,%f14
+ 10: b2 f4 0e 48 pfix.sd %f30,%f14
+ 14: b2 c5 02 48 pfix.dd %f24,%f2
+ 18: ba 44 0a 48 pftrunc.sd %f8,%f10
+ 1c: ba 65 0e 48 pftrunc.dd %f12,%f14
+ 20: 34 04 22 48 pfgt.ss %f0,%f1,%f2
+ 24: 34 35 0a 49 pfgt.dd %f6,%f8,%f10
+ 28: b4 2c c7 48 pfle.ss %f5,%f6,%f7
+ 2c: b4 65 d0 49 pfle.dd %f12,%f14,%f16
+ 30: 35 5c 8d 49 pfeq.ss %f11,%f12,%f13
+ 34: 35 95 96 4a pfeq.dd %f18,%f20,%f22
+ 38: b2 12 1e 48 d.fix.sd %f2,%f30
+ 3c: 00 00 00 a0 shl %r0,%r0,%r0
+ 40: b2 33 08 48 d.fix.dd %f6,%f8
+ 44: 00 00 00 a0 shl %r0,%r0,%r0
+ 48: ba 42 18 48 d.ftrunc.sd %f8,%f24
+ 4c: 00 00 00 a0 shl %r0,%r0,%r0
+ 50: ba 63 0e 48 d.ftrunc.dd %f12,%f14
+ 54: 00 00 00 a0 shl %r0,%r0,%r0
+ 58: b2 16 1e 48 d.pfix.sd %f2,%f30
+ 5c: 00 00 00 a0 shl %r0,%r0,%r0
+ 60: b2 37 08 48 d.pfix.dd %f6,%f8
+ 64: 00 00 00 a0 shl %r0,%r0,%r0
+ 68: ba 46 18 48 d.pftrunc.sd %f8,%f24
+ 6c: 00 00 00 a0 shl %r0,%r0,%r0
+ 70: ba 67 0e 48 d.pftrunc.dd %f12,%f14
+ 74: 00 00 00 a0 shl %r0,%r0,%r0
+ 78: 34 06 22 48 d.pfgt.ss %f0,%f1,%f2
+ 7c: 00 00 00 a0 shl %r0,%r0,%r0
+ 80: 34 37 0a 49 d.pfgt.dd %f6,%f8,%f10
+ 84: 00 00 00 a0 shl %r0,%r0,%r0
+ 88: b4 2e c7 48 d.pfle.ss %f5,%f6,%f7
+ 8c: 00 00 00 a0 shl %r0,%r0,%r0
+ 90: b4 67 d0 49 d.pfle.dd %f12,%f14,%f16
+ 94: 00 00 00 a0 shl %r0,%r0,%r0
+ 98: 35 5e 8d 49 d.pfeq.ss %f11,%f12,%f13
+ 9c: 00 00 00 a0 shl %r0,%r0,%r0
+ a0: 35 97 96 4a d.pfeq.dd %f18,%f20,%f22
+ a4: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# fix, ftrunc, pfgt, pfle, pfeq
+
+ .text
+
+ # Non-pipelined, without dual bit
+ fix.sd %f2,%f4
+ fix.dd %f6,%f8
+
+ ftrunc.sd %f8,%f10
+ ftrunc.dd %f12,%f14
+
+ # Pipelined, without dual bit
+ pfix.sd %f30,%f14
+ pfix.dd %f24,%f2
+
+ pftrunc.sd %f8,%f10
+ pftrunc.dd %f12,%f14
+
+ pfgt.ss %f0,%f1,%f2
+ pfgt.dd %f6,%f8,%f10
+
+ pfle.ss %f5,%f6,%f7
+ pfle.dd %f12,%f14,%f16
+
+ pfeq.ss %f11,%f12,%f13
+ pfeq.dd %f18,%f20,%f22
+
+ # Non-pipelined, with dual bit
+ d.fix.sd %f2,%f30
+ nop
+ d.fix.dd %f6,%f8
+ nop
+
+ d.ftrunc.sd %f8,%f24
+ nop
+ d.ftrunc.dd %f12,%f14
+ nop
+
+ # Pipelined, with dual bit
+ d.pfix.sd %f2,%f30
+ nop
+ d.pfix.dd %f6,%f8
+ nop
+
+ d.pftrunc.sd %f8,%f24
+ nop
+ d.pftrunc.dd %f12,%f14
+ nop
+
+ d.pfgt.ss %f0,%f1,%f2
+ nop
+ d.pfgt.dd %f6,%f8,%f10
+ nop
+
+ d.pfle.ss %f5,%f6,%f7
+ nop
+ d.pfle.dd %f12,%f14,%f16
+ nop
+
+ d.pfeq.ss %f11,%f12,%f13
+ nop
+ d.pfeq.dd %f18,%f20,%f22
+ nop
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: float04
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 40 08 03 48 fxfr %f1,%fp
+ 4: 40 40 1e 48 fxfr %f8,%r30
+ 8: 40 f8 12 48 fxfr %f31,%r18
+ c: 00 48 1f 08 ixfr %r9,%f31
+ 10: 00 b8 10 08 ixfr %r23,%f16
+ 14: 00 00 00 08 ixfr %r0,%f0
+ 18: 49 00 22 48 fiadd.ss %f0,%f1,%f2
+ 1c: c9 31 0a 49 fiadd.dd %f6,%f8,%f10
+ 20: 4d 28 c7 48 fisub.ss %f5,%f6,%f7
+ 24: cd 61 d0 49 fisub.dd %f12,%f14,%f16
+ 28: 49 74 f0 49 pfiadd.ss %f14,%f15,%f16
+ 2c: c9 b5 1a 4b pfiadd.dd %f22,%f24,%f26
+ 30: 4d a4 b6 4a pfisub.ss %f20,%f21,%f22
+ 34: cd e5 c2 4b pfisub.dd %f28,%f30,%f2
+ 38: 49 02 22 48 d.fiadd.ss %f0,%f1,%f2
+ 3c: 00 00 00 a0 shl %r0,%r0,%r0
+ 40: c9 33 0a 49 d.fiadd.dd %f6,%f8,%f10
+ 44: 00 00 00 a0 shl %r0,%r0,%r0
+ 48: 4d 2a c7 48 d.fisub.ss %f5,%f6,%f7
+ 4c: 00 00 00 a0 shl %r0,%r0,%r0
+ 50: cd 63 d0 49 d.fisub.dd %f12,%f14,%f16
+ 54: 00 00 00 a0 shl %r0,%r0,%r0
+ 58: 49 76 f0 49 d.pfiadd.ss %f14,%f15,%f16
+ 5c: 00 00 00 a0 shl %r0,%r0,%r0
+ 60: c9 b7 1a 4b d.pfiadd.dd %f22,%f24,%f26
+ 64: 00 00 00 a0 shl %r0,%r0,%r0
+ 68: 4d a6 b6 4a d.pfisub.ss %f20,%f21,%f22
+ 6c: 00 00 00 a0 shl %r0,%r0,%r0
+ 70: cd e7 c2 4b d.pfisub.dd %f28,%f30,%f2
+ 74: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# fxfr, ixfr, fiadd, fisub
+
+ .text
+
+ # ixfr, fxfr
+ fxfr %f1,%r3
+ fxfr %f8,%r30
+ fxfr %f31,%r18
+
+ ixfr %r9,%f31
+ ixfr %r23,%f16
+ ixfr %r0,%f0
+
+ # Non-pipelined, without dual bit
+ fiadd.ss %f0,%f1,%f2
+ fiadd.dd %f6,%f8,%f10
+
+ fisub.ss %f5,%f6,%f7
+ fisub.dd %f12,%f14,%f16
+
+ # Pipelined, without dual bit
+ pfiadd.ss %f14,%f15,%f16
+ pfiadd.dd %f22,%f24,%f26
+
+ pfisub.ss %f20,%f21,%f22
+ pfisub.dd %f28,%f30,%f2
+
+ # Non-pipelined, with dual bit
+ d.fiadd.ss %f0,%f1,%f2
+ nop
+ d.fiadd.dd %f6,%f8,%f10
+ nop
+
+ d.fisub.ss %f5,%f6,%f7
+ nop
+ d.fisub.dd %f12,%f14,%f16
+ nop
+
+ # Pipelined, with dual bit
+ d.pfiadd.ss %f14,%f15,%f16
+ nop
+ d.pfiadd.dd %f22,%f24,%f26
+ nop
+
+ d.pfisub.ss %f20,%f21,%f22
+ nop
+ d.pfisub.dd %f28,%f30,%f2
+ nop
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: form/pform
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: da 05 02 48 pform %f0,%f2
+ 4: da 15 04 48 pform %f2,%f4
+ 8: da 25 06 48 pform %f4,%f6
+ c: da 45 0a 48 pform %f8,%f10
+ 10: da 65 0e 48 pform %f12,%f14
+ 14: da 85 12 48 pform %f16,%f18
+ 18: da a5 16 48 pform %f20,%f22
+ 1c: da c5 1a 48 pform %f24,%f26
+ 20: da e5 1e 48 pform %f28,%f30
+ 24: da 01 02 48 form %f0,%f2
+ 28: da 11 04 48 form %f2,%f4
+ 2c: da 21 06 48 form %f4,%f6
+ 30: da 41 0a 48 form %f8,%f10
+ 34: da 61 0e 48 form %f12,%f14
+ 38: da 81 12 48 form %f16,%f18
+ 3c: da a1 16 48 form %f20,%f22
+ 40: da c1 1a 48 form %f24,%f26
+ 44: da e1 1e 48 form %f28,%f30
+ 48: da 07 02 48 d.pform %f0,%f2
+ 4c: 00 00 00 a0 shl %r0,%r0,%r0
+ 50: da 17 04 48 d.pform %f2,%f4
+ 54: 00 00 00 a0 shl %r0,%r0,%r0
+ 58: da 27 06 48 d.pform %f4,%f6
+ 5c: 00 00 00 a0 shl %r0,%r0,%r0
+ 60: da 47 0a 48 d.pform %f8,%f10
+ 64: 00 00 00 a0 shl %r0,%r0,%r0
+ 68: da 67 0e 48 d.pform %f12,%f14
+ 6c: 00 00 00 a0 shl %r0,%r0,%r0
+ 70: da 87 12 48 d.pform %f16,%f18
+ 74: 00 00 00 a0 shl %r0,%r0,%r0
+ 78: da a7 16 48 d.pform %f20,%f22
+ 7c: 00 00 00 a0 shl %r0,%r0,%r0
+ 80: da c7 1a 48 d.pform %f24,%f26
+ 84: 00 00 00 a0 shl %r0,%r0,%r0
+ 88: da e7 1e 48 d.pform %f28,%f30
+ 8c: 00 00 00 a0 shl %r0,%r0,%r0
+ 90: da 03 02 48 d.form %f0,%f2
+ 94: 00 00 00 a0 shl %r0,%r0,%r0
+ 98: da 13 04 48 d.form %f2,%f4
+ 9c: 00 00 00 a0 shl %r0,%r0,%r0
+ a0: da 23 06 48 d.form %f4,%f6
+ a4: 00 00 00 a0 shl %r0,%r0,%r0
+ a8: da 43 0a 48 d.form %f8,%f10
+ ac: 00 00 00 a0 shl %r0,%r0,%r0
+ b0: da 63 0e 48 d.form %f12,%f14
+ b4: 00 00 00 a0 shl %r0,%r0,%r0
+ b8: da 83 12 48 d.form %f16,%f18
+ bc: 00 00 00 a0 shl %r0,%r0,%r0
+ c0: da a3 16 48 d.form %f20,%f22
+ c4: 00 00 00 a0 shl %r0,%r0,%r0
+ c8: da c3 1a 48 d.form %f24,%f26
+ cc: 00 00 00 a0 shl %r0,%r0,%r0
+ d0: da e3 1e 48 d.form %f28,%f30
+ d4: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# form and pform
+
+ .text
+
+ # pform, no dual bit
+ pform %f0,%f2
+ pform %f2,%f4
+ pform %f4,%f6
+ pform %f8,%f10
+ pform %f12,%f14
+ pform %f16,%f18
+ pform %f20,%f22
+ pform %f24,%f26
+ pform %f28,%f30
+
+ # form, no dual bit
+ form %f0,%f2
+ form %f2,%f4
+ form %f4,%f6
+ form %f8,%f10
+ form %f12,%f14
+ form %f16,%f18
+ form %f20,%f22
+ form %f24,%f26
+ form %f28,%f30
+
+ # pform, with dual bit
+ d.pform %f0,%f2
+ nop
+ d.pform %f2,%f4
+ nop
+ d.pform %f4,%f6
+ nop
+ d.pform %f8,%f10
+ nop
+ d.pform %f12,%f14
+ nop
+ d.pform %f16,%f18
+ nop
+ d.pform %f20,%f22
+ nop
+ d.pform %f24,%f26
+ nop
+ d.pform %f28,%f30
+ nop
+
+ # form, with dual bit
+ d.form %f0,%f2
+ nop
+ d.form %f2,%f4
+ nop
+ d.form %f4,%f6
+ nop
+ d.form %f8,%f10
+ nop
+ d.form %f12,%f14
+ nop
+ d.form %f16,%f18
+ nop
+ d.form %f20,%f22
+ nop
+ d.form %f24,%f26
+ nop
+ d.form %f28,%f30
+ nop
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: iarith
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 22 80 addu %r0,%r1,%sp
+ 4: 00 18 85 80 addu %fp,%r4,%r5
+ 8: 00 30 e8 80 addu %r6,%r7,%r8
+ c: 00 48 4b 81 addu %r9,%r10,%r11
+ 10: 00 f8 ae 81 addu %r31,%r13,%r14
+ 14: 00 78 11 82 addu %r15,%r16,%r17
+ 18: 00 90 74 82 addu %r18,%r19,%r20
+ 1c: 00 a8 d7 82 addu %r21,%r22,%r23
+ 20: 00 c0 3f 83 addu %r24,%r25,%r31
+ 24: 00 d8 9d 83 addu %r27,%r28,%r29
+ 28: 00 f0 e0 83 addu %r30,%r31,%r0
+ 2c: 00 00 22 90 adds %r0,%r1,%sp
+ 30: 00 18 85 90 adds %fp,%r4,%r5
+ 34: 00 30 e8 90 adds %r6,%r7,%r8
+ 38: 00 48 4b 91 adds %r9,%r10,%r11
+ 3c: 00 f8 ae 91 adds %r31,%r13,%r14
+ 40: 00 78 11 92 adds %r15,%r16,%r17
+ 44: 00 90 74 92 adds %r18,%r19,%r20
+ 48: 00 a8 d7 92 adds %r21,%r22,%r23
+ 4c: 00 c0 3f 93 adds %r24,%r25,%r31
+ 50: 00 d8 9d 93 adds %r27,%r28,%r29
+ 54: 00 f0 e0 93 adds %r30,%r31,%r0
+ 58: 00 00 22 88 subu %r0,%r1,%sp
+ 5c: 00 18 85 88 subu %fp,%r4,%r5
+ 60: 00 30 e8 88 subu %r6,%r7,%r8
+ 64: 00 48 4b 89 subu %r9,%r10,%r11
+ 68: 00 f8 ae 89 subu %r31,%r13,%r14
+ 6c: 00 78 11 8a subu %r15,%r16,%r17
+ 70: 00 90 74 8a subu %r18,%r19,%r20
+ 74: 00 a8 d7 8a subu %r21,%r22,%r23
+ 78: 00 c0 3f 8b subu %r24,%r25,%r31
+ 7c: 00 d8 9d 8b subu %r27,%r28,%r29
+ 80: 00 f0 e0 8b subu %r30,%r31,%r0
+ 84: 00 00 22 98 subs %r0,%r1,%sp
+ 88: 00 18 85 98 subs %fp,%r4,%r5
+ 8c: 00 30 e8 98 subs %r6,%r7,%r8
+ 90: 00 48 4b 99 subs %r9,%r10,%r11
+ 94: 00 f8 ae 99 subs %r31,%r13,%r14
+ 98: 00 78 11 9a subs %r15,%r16,%r17
+ 9c: 00 90 74 9a subs %r18,%r19,%r20
+ a0: 00 a8 d7 9a subs %r21,%r22,%r23
+ a4: 00 c0 3f 9b subs %r24,%r25,%r31
+ a8: 00 d8 9d 9b subs %r27,%r28,%r29
+ ac: 00 f0 e0 9b subs %r30,%r31,%r0
+ b0: 00 00 22 84 addu 0,%r1,%sp
+ b4: 00 20 85 84 addu 8192,%r4,%r5
+ b8: f5 13 e8 84 addu 5109,%r7,%r8
+ bc: ff 7f 4b 85 addu 32767,%r10,%r11
+ c0: 00 80 ae 85 addu -32768,%r13,%r14
+ c4: 00 e0 11 86 addu -8192,%r16,%r17
+ c8: ff ff 74 86 addu -1,%r19,%r20
+ cc: cd ab d7 86 addu -21555,%r22,%r23
+ d0: 34 12 3a 87 addu 4660,%r25,%r26
+ d4: 00 00 9d 87 addu 0,%r28,%r29
+ d8: 03 00 e0 87 addu 3,%r31,%r0
+ dc: 00 00 22 94 adds 0,%r1,%sp
+ e0: 00 20 85 94 adds 8192,%r4,%r5
+ e4: f5 13 e8 94 adds 5109,%r7,%r8
+ e8: ff 7f 4b 95 adds 32767,%r10,%r11
+ ec: 00 80 ae 95 adds -32768,%r13,%r14
+ f0: 00 e0 11 96 adds -8192,%r16,%r17
+ f4: ff ff 74 96 adds -1,%r19,%r20
+ f8: cd ab d7 96 adds -21555,%r22,%r23
+ fc: 34 12 3a 97 adds 4660,%r25,%r26
+ 100: 00 00 9d 97 adds 0,%r28,%r29
+ 104: 03 00 e0 97 adds 3,%r31,%r0
+ 108: 01 00 22 8c subu 1,%r1,%sp
+ 10c: 01 20 85 8c subu 8193,%r4,%r5
+ 110: f6 13 e8 8c subu 5110,%r7,%r8
+ 114: ff 7f 4b 8d subu 32767,%r10,%r11
+ 118: 00 80 ae 8d subu -32768,%r13,%r14
+ 11c: 00 e0 11 8e subu -8192,%r16,%r17
+ 120: ff ff 74 8e subu -1,%r19,%r20
+ 124: cd ab d7 8e subu -21555,%r22,%r23
+ 128: 34 12 3a 8f subu 4660,%r25,%r26
+ 12c: 00 00 9d 8f subu 0,%r28,%r29
+ 130: 03 00 e0 8f subu 3,%r31,%r0
+ 134: 01 00 22 9c subs 1,%r1,%sp
+ 138: 01 20 85 9c subs 8193,%r4,%r5
+ 13c: f6 13 e8 9c subs 5110,%r7,%r8
+ 140: ff 7f 4b 9d subs 32767,%r10,%r11
+ 144: 00 80 ae 9d subs -32768,%r13,%r14
+ 148: 00 e0 11 9e subs -8192,%r16,%r17
+ 14c: ff ff 74 9e subs -1,%r19,%r20
+ 150: cd ab d7 9e subs -21555,%r22,%r23
+ 154: 34 12 3a 9f subs 4660,%r25,%r26
+ 158: 00 00 9d 9f subs 0,%r28,%r29
+ 15c: 03 00 e0 9f subs 3,%r31,%r0
--- /dev/null
+# addu, adds, subu, subs
+
+ .text
+
+ # Register forms
+ addu %r0,%r1,%r2
+ addu %r3,%r4,%r5
+ addu %r6,%r7,%r8
+ addu %r9,%r10,%r11
+ addu %r31,%r13,%r14
+ addu %r15,%r16,%r17
+ addu %r18,%r19,%r20
+ addu %r21,%r22,%r23
+ addu %r24,%r25,%r31
+ addu %r27,%r28,%r29
+ addu %r30,%r31,%r0
+
+ adds %r0,%r1,%r2
+ adds %r3,%r4,%r5
+ adds %r6,%r7,%r8
+ adds %r9,%r10,%r11
+ adds %r31,%r13,%r14
+ adds %r15,%r16,%r17
+ adds %r18,%r19,%r20
+ adds %r21,%r22,%r23
+ adds %r24,%r25,%r31
+ adds %r27,%r28,%r29
+ adds %r30,%r31,%r0
+
+ subu %r0,%r1,%r2
+ subu %r3,%r4,%r5
+ subu %r6,%r7,%r8
+ subu %r9,%r10,%r11
+ subu %r31,%r13,%r14
+ subu %r15,%r16,%r17
+ subu %r18,%r19,%r20
+ subu %r21,%r22,%r23
+ subu %r24,%r25,%r31
+ subu %r27,%r28,%r29
+ subu %r30,%r31,%r0
+
+ subs %r0,%r1,%r2
+ subs %r3,%r4,%r5
+ subs %r6,%r7,%r8
+ subs %r9,%r10,%r11
+ subs %r31,%r13,%r14
+ subs %r15,%r16,%r17
+ subs %r18,%r19,%r20
+ subs %r21,%r22,%r23
+ subs %r24,%r25,%r31
+ subs %r27,%r28,%r29
+ subs %r30,%r31,%r0
+
+ # Immediate forms (all)
+ addu 0,%r1,%r2
+ addu 8192,%r4,%r5
+ addu 5109,%r7,%r8
+ addu 32767,%r10,%r11
+ addu -32768,%r13,%r14
+ addu -8192,%r16,%r17
+ addu -1,%r19,%r20
+ addu -21555,%r22,%r23
+ addu 0x1234,%r25,%r26
+ addu 0x0,%r28,%r29
+ addu 0x3,%r31,%r0
+
+ adds 0,%r1,%r2
+ adds 8192,%r4,%r5
+ adds 5109,%r7,%r8
+ adds 32767,%r10,%r11
+ adds -32768,%r13,%r14
+ adds -8192,%r16,%r17
+ adds -1,%r19,%r20
+ adds -21555,%r22,%r23
+ adds 0x1234,%r25,%r26
+ adds 0x0,%r28,%r29
+ adds 0x3,%r31,%r0
+
+ subu 1,%r1,%r2
+ subu 8193,%r4,%r5
+ subu 5110,%r7,%r8
+ subu 32767,%r10,%r11
+ subu -32768,%r13,%r14
+ subu -8192,%r16,%r17
+ subu -1,%r19,%r20
+ subu -21555,%r22,%r23
+ subu 0x1234,%r25,%r26
+ subu 0x0,%r28,%r29
+ subu 0x3,%r31,%r0
+
+ subs 1,%r1,%r2
+ subs 8193,%r4,%r5
+ subs 5110,%r7,%r8
+ subs 32767,%r10,%r11
+ subs -32768,%r13,%r14
+ subs -8192,%r16,%r17
+ subs -1,%r19,%r20
+ subs -21555,%r22,%r23
+ subs 0x1234,%r25,%r26
+ subs 0x0,%r28,%r29
+ subs 0x3,%r31,%r0
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: ldst01 (ld.l)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 01 00 00 14 ld.l 0\(%r0\),%r0
+ 4: 7d 00 3f 14 ld.l 124\(%r1\),%r31
+ 8: 01 01 5e 14 ld.l 256\(%sp\),%r30
+ c: 01 02 7d 14 ld.l 512\(%fp\),%r29
+ 10: 01 04 9c 14 ld.l 1024\(%r4\),%r28
+ 14: 01 10 bb 14 ld.l 4096\(%r5\),%r27
+ 18: 01 20 da 14 ld.l 8192\(%r6\),%r26
+ 1c: 01 40 f9 14 ld.l 16384\(%r7\),%r25
+ 20: 01 c0 18 15 ld.l -16384\(%r8\),%r24
+ 24: 01 e0 37 15 ld.l -8192\(%r9\),%r23
+ 28: 01 f0 56 15 ld.l -4096\(%r10\),%r22
+ 2c: 01 fc 75 15 ld.l -1024\(%r11\),%r21
+ 30: 05 fe 94 15 ld.l -508\(%r12\),%r20
+ 34: 09 ff b3 15 ld.l -248\(%r13\),%r19
+ 38: fd ff d2 15 ld.l -4\(%r14\),%r18
+ 3c: 01 28 00 10 ld.l %r5\(%r0\),%r0
+ 40: 01 30 3f 10 ld.l %r6\(%r1\),%r31
+ 44: 01 38 5e 10 ld.l %r7\(%sp\),%r30
+ 48: 01 40 7d 10 ld.l %r8\(%fp\),%r29
+ 4c: 01 48 9c 10 ld.l %r9\(%r4\),%r28
+ 50: 01 00 bb 10 ld.l %r0\(%r5\),%r27
+ 54: 01 08 da 10 ld.l %r1\(%r6\),%r26
+ 58: 01 60 f9 10 ld.l %r12\(%r7\),%r25
+ 5c: 01 68 18 11 ld.l %r13\(%r8\),%r24
+ 60: 01 70 37 11 ld.l %r14\(%r9\),%r23
+ 64: 01 78 56 11 ld.l %r15\(%r10\),%r22
+ 68: 01 80 75 11 ld.l %r16\(%r11\),%r21
+ 6c: 01 88 94 11 ld.l %r17\(%r12\),%r20
+ 70: 01 e0 b3 11 ld.l %r28\(%r13\),%r19
+ 74: 01 f8 d2 11 ld.l %r31\(%r14\),%r18
--- /dev/null
+# ld.l (no relocations here)
+ .text
+
+ ld.l 0(%r0),%r0
+ ld.l 124(%r1),%r31
+ ld.l 256(%r2),%r30
+ ld.l 512(%r3),%r29
+ ld.l 1024(%r4),%r28
+ ld.l 4096(%r5),%r27
+ ld.l 8192(%r6),%r26
+ ld.l 16384(%r7),%r25
+ ld.l -16384(%r8),%r24
+ ld.l -8192(%r9),%r23
+ ld.l -4096(%r10),%r22
+ ld.l -1024(%r11),%r21
+ ld.l -508(%r12),%r20
+ ld.l -248(%r13),%r19
+ ld.l -4(%r14),%r18
+
+ ld.l %r5(%r0),%r0
+ ld.l %r6(%r1),%r31
+ ld.l %r7(%r2),%r30
+ ld.l %r8(%r3),%r29
+ ld.l %r9(%r4),%r28
+ ld.l %r0(%r5),%r27
+ ld.l %r1(%r6),%r26
+ ld.l %r12(%r7),%r25
+ ld.l %r13(%r8),%r24
+ ld.l %r14(%r9),%r23
+ ld.l %r15(%r10),%r22
+ ld.l %r16(%r11),%r21
+ ld.l %r17(%r12),%r20
+ ld.l %r28(%r13),%r19
+ ld.l %r31(%r14),%r18
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: ldst02 (ld.s)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 00 14 ld.s 0\(%r0\),%r0
+ 4: 7a 00 3f 14 ld.s 122\(%r1\),%r31
+ 8: 02 01 5e 14 ld.s 258\(%sp\),%r30
+ c: 00 02 7d 14 ld.s 512\(%fp\),%r29
+ 10: 04 04 9c 14 ld.s 1028\(%r4\),%r28
+ 14: fa 0f bb 14 ld.s 4090\(%r5\),%r27
+ 18: fe 1f da 14 ld.s 8190\(%r6\),%r26
+ 1c: 00 40 f9 14 ld.s 16384\(%r7\),%r25
+ 20: 00 c0 18 15 ld.s -16384\(%r8\),%r24
+ 24: 00 e0 37 15 ld.s -8192\(%r9\),%r23
+ 28: 00 f0 56 15 ld.s -4096\(%r10\),%r22
+ 2c: 00 fc 75 15 ld.s -1024\(%r11\),%r21
+ 30: 04 fe 94 15 ld.s -508\(%r12\),%r20
+ 34: 0e ff b3 15 ld.s -242\(%r13\),%r19
+ 38: fe ff d2 15 ld.s -2\(%r14\),%r18
+ 3c: 00 28 00 10 ld.s %r5\(%r0\),%r0
+ 40: 00 30 3f 10 ld.s %r6\(%r1\),%r31
+ 44: 00 38 5e 10 ld.s %r7\(%sp\),%r30
+ 48: 00 40 7d 10 ld.s %r8\(%fp\),%r29
+ 4c: 00 48 9c 10 ld.s %r9\(%r4\),%r28
+ 50: 00 00 bb 10 ld.s %r0\(%r5\),%r27
+ 54: 00 08 da 10 ld.s %r1\(%r6\),%r26
+ 58: 00 60 f9 10 ld.s %r12\(%r7\),%r25
+ 5c: 00 68 18 11 ld.s %r13\(%r8\),%r24
+ 60: 00 70 37 11 ld.s %r14\(%r9\),%r23
+ 64: 00 78 56 11 ld.s %r15\(%r10\),%r22
+ 68: 00 80 75 11 ld.s %r16\(%r11\),%r21
+ 6c: 00 88 94 11 ld.s %r17\(%r12\),%r20
+ 70: 00 e0 b3 11 ld.s %r28\(%r13\),%r19
+ 74: 00 f8 d2 11 ld.s %r31\(%r14\),%r18
--- /dev/null
+# ld.s (no relocations here)
+ .text
+
+ ld.s 0(%r0),%r0
+ ld.s 122(%r1),%r31
+ ld.s 258(%r2),%r30
+ ld.s 512(%r3),%r29
+ ld.s 1028(%r4),%r28
+ ld.s 4090(%r5),%r27
+ ld.s 8190(%r6),%r26
+ ld.s 16384(%r7),%r25
+ ld.s -16384(%r8),%r24
+ ld.s -8192(%r9),%r23
+ ld.s -4096(%r10),%r22
+ ld.s -1024(%r11),%r21
+ ld.s -508(%r12),%r20
+ ld.s -242(%r13),%r19
+ ld.s -2(%r14),%r18
+
+ ld.s %r5(%r0),%r0
+ ld.s %r6(%r1),%r31
+ ld.s %r7(%r2),%r30
+ ld.s %r8(%r3),%r29
+ ld.s %r9(%r4),%r28
+ ld.s %r0(%r5),%r27
+ ld.s %r1(%r6),%r26
+ ld.s %r12(%r7),%r25
+ ld.s %r13(%r8),%r24
+ ld.s %r14(%r9),%r23
+ ld.s %r15(%r10),%r22
+ ld.s %r16(%r11),%r21
+ ld.s %r17(%r12),%r20
+ ld.s %r28(%r13),%r19
+ ld.s %r31(%r14),%r18
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: ldst03 (ld.b)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 00 04 ld.b 0\(%r0\),%r0
+ 4: 01 00 3f 04 ld.b 1\(%r1\),%r31
+ 8: 02 00 5e 04 ld.b 2\(%sp\),%r30
+ c: 01 02 7d 04 ld.b 513\(%fp\),%r29
+ 10: 04 04 9c 04 ld.b 1028\(%r4\),%r28
+ 14: fa 0f bb 04 ld.b 4090\(%r5\),%r27
+ 18: fe 1f da 04 ld.b 8190\(%r6\),%r26
+ 1c: 01 40 f9 04 ld.b 16385\(%r7\),%r25
+ 20: 07 7d f9 04 ld.b 32007\(%r7\),%r25
+ 24: ff 7f f9 04 ld.b 32767\(%r7\),%r25
+ 28: 00 80 f9 04 ld.b -32768\(%r7\),%r25
+ 2c: 01 80 f9 04 ld.b -32767\(%r7\),%r25
+ 30: 01 c0 18 05 ld.b -16383\(%r8\),%r24
+ 34: 5b e0 37 05 ld.b -8101\(%r9\),%r23
+ 38: 05 f0 56 05 ld.b -4091\(%r10\),%r22
+ 3c: 01 fc 75 05 ld.b -1023\(%r11\),%r21
+ 40: 03 fe 94 05 ld.b -509\(%r12\),%r20
+ 44: e9 ff b3 05 ld.b -23\(%r13\),%r19
+ 48: ff ff d2 05 ld.b -1\(%r14\),%r18
+ 4c: 00 28 00 00 ld.b %r5\(%r0\),%r0
+ 50: 00 30 3f 00 ld.b %r6\(%r1\),%r31
+ 54: 00 38 5e 00 ld.b %r7\(%sp\),%r30
+ 58: 00 40 7d 00 ld.b %r8\(%fp\),%r29
+ 5c: 00 48 9c 00 ld.b %r9\(%r4\),%r28
+ 60: 00 00 bb 00 ld.b %r0\(%r5\),%r27
+ 64: 00 08 da 00 ld.b %r1\(%r6\),%r26
+ 68: 00 60 f9 00 ld.b %r12\(%r7\),%r25
+ 6c: 00 68 18 01 ld.b %r13\(%r8\),%r24
+ 70: 00 70 37 01 ld.b %r14\(%r9\),%r23
+ 74: 00 78 56 01 ld.b %r15\(%r10\),%r22
+ 78: 00 80 75 01 ld.b %r16\(%r11\),%r21
+ 7c: 00 88 94 01 ld.b %r17\(%r12\),%r20
+ 80: 00 e0 b3 01 ld.b %r28\(%r13\),%r19
+ 84: 00 f8 d2 01 ld.b %r31\(%r14\),%r18
--- /dev/null
+# ld.b (no relocations here)
+ .text
+
+ ld.b 0(%r0),%r0
+ ld.b 1(%r1),%r31
+ ld.b 2(%r2),%r30
+ ld.b 513(%r3),%r29
+ ld.b 1028(%r4),%r28
+ ld.b 4090(%r5),%r27
+ ld.b 8190(%r6),%r26
+ ld.b 16385(%r7),%r25
+ ld.b 32007(%r7),%r25
+ ld.b 32767(%r7),%r25
+ ld.b -32768(%r7),%r25
+ ld.b -32767(%r7),%r25
+ ld.b -16383(%r8),%r24
+ ld.b -8101(%r9),%r23
+ ld.b -4091(%r10),%r22
+ ld.b -1023(%r11),%r21
+ ld.b -509(%r12),%r20
+ ld.b -23(%r13),%r19
+ ld.b -1(%r14),%r18
+
+ ld.b %r5(%r0),%r0
+ ld.b %r6(%r1),%r31
+ ld.b %r7(%r2),%r30
+ ld.b %r8(%r3),%r29
+ ld.b %r9(%r4),%r28
+ ld.b %r0(%r5),%r27
+ ld.b %r1(%r6),%r26
+ ld.b %r12(%r7),%r25
+ ld.b %r13(%r8),%r24
+ ld.b %r14(%r9),%r23
+ ld.b %r15(%r10),%r22
+ ld.b %r16(%r11),%r21
+ ld.b %r17(%r12),%r20
+ ld.b %r28(%r13),%r19
+ ld.b %r31(%r14),%r18
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: ldst04 (st.l)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 01 00 00 1c st.l %r0,0\(%r0\)
+ 4: 7d f8 20 1c st.l %r31,124\(%r1\)
+ 8: 01 f1 40 1c st.l %r30,256\(%sp\)
+ c: 01 ea 60 1c st.l %r29,512\(%fp\)
+ 10: 01 e4 80 1c st.l %r28,1024\(%r4\)
+ 14: 01 d8 a2 1c st.l %r27,4096\(%r5\)
+ 18: 01 d0 c4 1c st.l %r26,8192\(%r6\)
+ 1c: 01 c8 e8 1c st.l %r25,16384\(%r7\)
+ 20: 01 c0 18 1d st.l %r24,-16384\(%r8\)
+ 24: 01 b8 3c 1d st.l %r23,-8192\(%r9\)
+ 28: 01 b0 5e 1d st.l %r22,-4096\(%r10\)
+ 2c: 01 ac 7f 1d st.l %r21,-1024\(%r11\)
+ 30: 05 a6 9f 1d st.l %r20,-508\(%r12\)
+ 34: 09 9f bf 1d st.l %r19,-248\(%r13\)
+ 38: fd 97 df 1d st.l %r18,-4\(%r14\)
--- /dev/null
+# st.l (no relocations here)
+ .text
+
+ st.l %r0,0(%r0)
+ st.l %r31,124(%r1)
+ st.l %r30,256(%r2)
+ st.l %r29,512(%r3)
+ st.l %r28,1024(%r4)
+ st.l %r27,4096(%r5)
+ st.l %r26,8192(%r6)
+ st.l %r25,16384(%r7)
+ st.l %r24,-16384(%r8)
+ st.l %r23,-8192(%r9)
+ st.l %r22,-4096(%r10)
+ st.l %r21,-1024(%r11)
+ st.l %r20,-508(%r12)
+ st.l %r19,-248(%r13)
+ st.l %r18,-4(%r14)
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: ldst05 (st.s)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 00 1c st.s %r0,0\(%r0\)
+ 4: 7a f8 20 1c st.s %r31,122\(%r1\)
+ 8: 02 f1 40 1c st.s %r30,258\(%sp\)
+ c: 00 ea 60 1c st.s %r29,512\(%fp\)
+ 10: 04 e4 80 1c st.s %r28,1028\(%r4\)
+ 14: fa df a1 1c st.s %r27,4090\(%r5\)
+ 18: fe d7 c3 1c st.s %r26,8190\(%r6\)
+ 1c: 00 c8 e8 1c st.s %r25,16384\(%r7\)
+ 20: 00 c0 18 1d st.s %r24,-16384\(%r8\)
+ 24: 00 b8 3c 1d st.s %r23,-8192\(%r9\)
+ 28: 00 b0 5e 1d st.s %r22,-4096\(%r10\)
+ 2c: 00 ac 7f 1d st.s %r21,-1024\(%r11\)
+ 30: 04 a6 9f 1d st.s %r20,-508\(%r12\)
+ 34: 0e 9f bf 1d st.s %r19,-242\(%r13\)
+ 38: fe 97 df 1d st.s %r18,-2\(%r14\)
--- /dev/null
+# st.s (no relocations here)
+ .text
+
+ st.s %r0,0(%r0)
+ st.s %r31,122(%r1)
+ st.s %r30,258(%r2)
+ st.s %r29,512(%r3)
+ st.s %r28,1028(%r4)
+ st.s %r27,4090(%r5)
+ st.s %r26,8190(%r6)
+ st.s %r25,16384(%r7)
+ st.s %r24,-16384(%r8)
+ st.s %r23,-8192(%r9)
+ st.s %r22,-4096(%r10)
+ st.s %r21,-1024(%r11)
+ st.s %r20,-508(%r12)
+ st.s %r19,-242(%r13)
+ st.s %r18,-2(%r14)
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: ldst06 (st.b)
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 00 0c st.b %r0,0\(%r0\)
+ 4: 01 f8 20 0c st.b %r31,1\(%r1\)
+ 8: 02 f0 40 0c st.b %r30,2\(%sp\)
+ c: 01 ea 60 0c st.b %r29,513\(%fp\)
+ 10: 04 e4 80 0c st.b %r28,1028\(%r4\)
+ 14: fa df a1 0c st.b %r27,4090\(%r5\)
+ 18: fe d7 c3 0c st.b %r26,8190\(%r6\)
+ 1c: 01 c8 e8 0c st.b %r25,16385\(%r7\)
+ 20: 07 cd ef 0c st.b %r25,32007\(%r7\)
+ 24: ff cf ef 0c st.b %r25,32767\(%r7\)
+ 28: 00 c8 f0 0c st.b %r25,-32768\(%r7\)
+ 2c: 01 c8 f0 0c st.b %r25,-32767\(%r7\)
+ 30: 01 c0 18 0d st.b %r24,-16383\(%r8\)
+ 34: 5b b8 3c 0d st.b %r23,-8101\(%r9\)
+ 38: 05 b0 5e 0d st.b %r22,-4091\(%r10\)
+ 3c: 01 ac 7f 0d st.b %r21,-1023\(%r11\)
+ 40: 03 a6 9f 0d st.b %r20,-509\(%r12\)
+ 44: e9 9f bf 0d st.b %r19,-23\(%r13\)
+ 48: ff 97 df 0d st.b %r18,-1\(%r14\)
--- /dev/null
+# st.b (no relocations here)
+ .text
+
+ st.b %r0,0(%r0)
+ st.b %r31,1(%r1)
+ st.b %r30,2(%r2)
+ st.b %r29,513(%r3)
+ st.b %r28,1028(%r4)
+ st.b %r27,4090(%r5)
+ st.b %r26,8190(%r6)
+ st.b %r25,16385(%r7)
+ st.b %r25,32007(%r7)
+ st.b %r25,32767(%r7)
+ st.b %r25,-32768(%r7)
+ st.b %r25,-32767(%r7)
+ st.b %r24,-16383(%r8)
+ st.b %r23,-8101(%r9)
+ st.b %r22,-4091(%r10)
+ st.b %r21,-1023(%r11)
+ st.b %r20,-509(%r12)
+ st.b %r19,-23(%r13)
+ st.b %r18,-1(%r14)
--- /dev/null
+#as:
+#objdump: -dr
+#name: pfam
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 04 22 48 r2p1.ss %f0,%f1,%f2
+ 4: 80 1c 85 48 r2p1.sd %f3,%f4,%f5
+ 8: 80 05 44 48 r2p1.dd %f0,%f2,%f4
+ c: 01 0c 43 48 r2pt.ss %f1,%f2,%f3
+ 10: 81 24 a6 48 r2pt.sd %f4,%f5,%f6
+ 14: 81 15 86 48 r2pt.dd %f2,%f4,%f6
+ 18: 02 14 64 48 r2ap1.ss %f2,%f3,%f4
+ 1c: 82 34 e8 48 r2ap1.sd %f6,%f7,%f8
+ 20: 82 25 c8 48 r2ap1.dd %f4,%f6,%f8
+ 24: 03 1c 85 48 r2apt.ss %f3,%f4,%f5
+ 28: 83 3c 09 49 r2apt.sd %f7,%f8,%f9
+ 2c: 83 35 0a 49 r2apt.dd %f6,%f8,%f10
+ 30: 04 24 a6 48 i2p1.ss %f4,%f5,%f6
+ 34: 84 44 2a 49 i2p1.sd %f8,%f9,%f10
+ 38: 84 65 d0 49 i2p1.dd %f12,%f14,%f16
+ 3c: 05 3c 09 49 i2pt.ss %f7,%f8,%f9
+ 40: 85 5c 8d 49 i2pt.sd %f11,%f12,%f13
+ 44: 85 75 12 4a i2pt.dd %f14,%f16,%f18
+ 48: 06 54 6c 49 i2ap1.ss %f10,%f11,%f12
+ 4c: 86 74 f0 49 i2ap1.sd %f14,%f15,%f16
+ 50: 86 85 54 4a i2ap1.dd %f16,%f18,%f20
+ 54: 07 6c cf 49 i2apt.ss %f13,%f14,%f15
+ 58: 87 8c 53 4a i2apt.sd %f17,%f18,%f19
+ 5c: 87 95 96 4a i2apt.dd %f18,%f20,%f22
+ 60: 08 74 f0 49 rat1p2.ss %f14,%f15,%f16
+ 64: 88 a4 b6 4a rat1p2.sd %f20,%f21,%f22
+ 68: 88 a5 d8 4a rat1p2.dd %f20,%f22,%f24
+ 6c: 09 7c 11 4a m12apm.ss %f15,%f16,%f17
+ 70: 89 bc 19 4b m12apm.sd %f23,%f24,%f25
+ 74: 89 b5 1a 4b m12apm.dd %f22,%f24,%f26
+ 78: 0a 94 74 4a ra1p2.ss %f18,%f19,%f20
+ 7c: 8a d4 7c 4b ra1p2.sd %f26,%f27,%f28
+ 80: 8a a5 d8 4a ra1p2.dd %f20,%f22,%f24
+ 84: 0b 9c 95 4a m12ttpa.ss %f19,%f20,%f21
+ 88: 8b ec df 4b m12ttpa.sd %f29,%f30,%f31
+ 8c: 8b b5 1a 4b m12ttpa.dd %f22,%f24,%f26
+ 90: 0c a4 b6 4a iat1p2.ss %f20,%f21,%f22
+ 94: 8c 04 22 48 iat1p2.sd %f0,%f1,%f2
+ 98: 8c c5 5c 4b iat1p2.dd %f24,%f26,%f28
+ 9c: 0d ac d7 4a m12tpm.ss %f21,%f22,%f23
+ a0: 8d 1c 85 48 m12tpm.sd %f3,%f4,%f5
+ a4: 8d f5 02 48 m12tpm.dd %f30,%f0,%f2
+ a8: 0e b4 f8 4a ia1p2.ss %f22,%f23,%f24
+ ac: 8e 34 e8 48 ia1p2.sd %f6,%f7,%f8
+ b0: 8e 25 c8 48 ia1p2.dd %f4,%f6,%f8
+ b4: 0f bc 19 4b m12tpa.ss %f23,%f24,%f25
+ b8: 8f 4c 4b 49 m12tpa.sd %f9,%f10,%f11
+ bc: 8f 35 0a 49 m12tpa.dd %f6,%f8,%f10
+ c0: 00 06 22 48 d.r2p1.ss %f0,%f1,%f2
+ c4: 00 00 00 a0 shl %r0,%r0,%r0
+ c8: 80 1e 85 48 d.r2p1.sd %f3,%f4,%f5
+ cc: 00 00 00 a0 shl %r0,%r0,%r0
+ d0: 80 07 44 48 d.r2p1.dd %f0,%f2,%f4
+ d4: 00 00 00 a0 shl %r0,%r0,%r0
+ d8: 01 0e 43 48 d.r2pt.ss %f1,%f2,%f3
+ dc: 00 00 00 a0 shl %r0,%r0,%r0
+ e0: 81 26 a6 48 d.r2pt.sd %f4,%f5,%f6
+ e4: 00 00 00 a0 shl %r0,%r0,%r0
+ e8: 81 17 86 48 d.r2pt.dd %f2,%f4,%f6
+ ec: 00 00 00 a0 shl %r0,%r0,%r0
+ f0: 02 16 64 48 d.r2ap1.ss %f2,%f3,%f4
+ f4: 00 00 00 a0 shl %r0,%r0,%r0
+ f8: 82 36 e8 48 d.r2ap1.sd %f6,%f7,%f8
+ fc: 00 00 00 a0 shl %r0,%r0,%r0
+ 100: 82 27 c8 48 d.r2ap1.dd %f4,%f6,%f8
+ 104: 00 00 00 a0 shl %r0,%r0,%r0
+ 108: 03 1e 85 48 d.r2apt.ss %f3,%f4,%f5
+ 10c: 00 00 00 a0 shl %r0,%r0,%r0
+ 110: 83 3e 09 49 d.r2apt.sd %f7,%f8,%f9
+ 114: 00 00 00 a0 shl %r0,%r0,%r0
+ 118: 83 37 0a 49 d.r2apt.dd %f6,%f8,%f10
+ 11c: 00 00 00 a0 shl %r0,%r0,%r0
+ 120: 04 26 a6 48 d.i2p1.ss %f4,%f5,%f6
+ 124: 00 00 00 a0 shl %r0,%r0,%r0
+ 128: 84 46 2a 49 d.i2p1.sd %f8,%f9,%f10
+ 12c: 00 00 00 a0 shl %r0,%r0,%r0
+ 130: 84 67 d0 49 d.i2p1.dd %f12,%f14,%f16
+ 134: 00 00 00 a0 shl %r0,%r0,%r0
+ 138: 05 3e 09 49 d.i2pt.ss %f7,%f8,%f9
+ 13c: 00 00 00 a0 shl %r0,%r0,%r0
+ 140: 85 5e 8d 49 d.i2pt.sd %f11,%f12,%f13
+ 144: 00 00 00 a0 shl %r0,%r0,%r0
+ 148: 85 77 12 4a d.i2pt.dd %f14,%f16,%f18
+ 14c: 00 00 00 a0 shl %r0,%r0,%r0
+ 150: 06 56 6c 49 d.i2ap1.ss %f10,%f11,%f12
+ 154: 00 00 00 a0 shl %r0,%r0,%r0
+ 158: 86 76 f0 49 d.i2ap1.sd %f14,%f15,%f16
+ 15c: 00 00 00 a0 shl %r0,%r0,%r0
+ 160: 86 87 54 4a d.i2ap1.dd %f16,%f18,%f20
+ 164: 00 00 00 a0 shl %r0,%r0,%r0
+ 168: 07 6e cf 49 d.i2apt.ss %f13,%f14,%f15
+ 16c: 00 00 00 a0 shl %r0,%r0,%r0
+ 170: 87 8e 53 4a d.i2apt.sd %f17,%f18,%f19
+ 174: 00 00 00 a0 shl %r0,%r0,%r0
+ 178: 87 97 96 4a d.i2apt.dd %f18,%f20,%f22
+ 17c: 00 00 00 a0 shl %r0,%r0,%r0
+ 180: 08 76 f0 49 d.rat1p2.ss %f14,%f15,%f16
+ 184: 00 00 00 a0 shl %r0,%r0,%r0
+ 188: 88 a6 b6 4a d.rat1p2.sd %f20,%f21,%f22
+ 18c: 00 00 00 a0 shl %r0,%r0,%r0
+ 190: 88 a7 d8 4a d.rat1p2.dd %f20,%f22,%f24
+ 194: 00 00 00 a0 shl %r0,%r0,%r0
+ 198: 09 7e 11 4a d.m12apm.ss %f15,%f16,%f17
+ 19c: 00 00 00 a0 shl %r0,%r0,%r0
+ 1a0: 89 be 19 4b d.m12apm.sd %f23,%f24,%f25
+ 1a4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1a8: 89 b7 1a 4b d.m12apm.dd %f22,%f24,%f26
+ 1ac: 00 00 00 a0 shl %r0,%r0,%r0
+ 1b0: 0a 96 74 4a d.ra1p2.ss %f18,%f19,%f20
+ 1b4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1b8: 8a d6 7c 4b d.ra1p2.sd %f26,%f27,%f28
+ 1bc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1c0: 8a a7 d8 4a d.ra1p2.dd %f20,%f22,%f24
+ 1c4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1c8: 0b 9e 95 4a d.m12ttpa.ss %f19,%f20,%f21
+ 1cc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1d0: 8b ee df 4b d.m12ttpa.sd %f29,%f30,%f31
+ 1d4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1d8: 8b b7 1a 4b d.m12ttpa.dd %f22,%f24,%f26
+ 1dc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1e0: 0c a6 b6 4a d.iat1p2.ss %f20,%f21,%f22
+ 1e4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1e8: 8c 06 22 48 d.iat1p2.sd %f0,%f1,%f2
+ 1ec: 00 00 00 a0 shl %r0,%r0,%r0
+ 1f0: 8c c7 5c 4b d.iat1p2.dd %f24,%f26,%f28
+ 1f4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1f8: 0d ae d7 4a d.m12tpm.ss %f21,%f22,%f23
+ 1fc: 00 00 00 a0 shl %r0,%r0,%r0
+ 200: 8d 1e 85 48 d.m12tpm.sd %f3,%f4,%f5
+ 204: 00 00 00 a0 shl %r0,%r0,%r0
+ 208: 8d f7 02 48 d.m12tpm.dd %f30,%f0,%f2
+ 20c: 00 00 00 a0 shl %r0,%r0,%r0
+ 210: 0e b6 f8 4a d.ia1p2.ss %f22,%f23,%f24
+ 214: 00 00 00 a0 shl %r0,%r0,%r0
+ 218: 8e 36 e8 48 d.ia1p2.sd %f6,%f7,%f8
+ 21c: 00 00 00 a0 shl %r0,%r0,%r0
+ 220: 8e 27 c8 48 d.ia1p2.dd %f4,%f6,%f8
+ 224: 00 00 00 a0 shl %r0,%r0,%r0
+ 228: 0f be 19 4b d.m12tpa.ss %f23,%f24,%f25
+ 22c: 00 00 00 a0 shl %r0,%r0,%r0
+ 230: 8f 4e 4b 49 d.m12tpa.sd %f9,%f10,%f11
+ 234: 00 00 00 a0 shl %r0,%r0,%r0
+ 238: 8f 37 0a 49 d.m12tpa.dd %f6,%f8,%f10
+ 23c: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# pfam.p family (p={ss,sd,dd})
+
+ .text
+
+ # pfam without dual bit.
+ r2p1.ss %f0,%f1,%f2
+ r2p1.sd %f3,%f4,%f5
+ r2p1.dd %f0,%f2,%f4
+
+ r2pt.ss %f1,%f2,%f3
+ r2pt.sd %f4,%f5,%f6
+ r2pt.dd %f2,%f4,%f6
+
+ r2ap1.ss %f2,%f3,%f4
+ r2ap1.sd %f6,%f7,%f8
+ r2ap1.dd %f4,%f6,%f8
+
+ r2apt.ss %f3,%f4,%f5
+ r2apt.sd %f7,%f8,%f9
+ r2apt.dd %f6,%f8,%f10
+
+ i2p1.ss %f4,%f5,%f6
+ i2p1.sd %f8,%f9,%f10
+ i2p1.dd %f12,%f14,%f16
+
+ i2pt.ss %f7,%f8,%f9
+ i2pt.sd %f11,%f12,%f13
+ i2pt.dd %f14,%f16,%f18
+
+ i2ap1.ss %f10,%f11,%f12
+ i2ap1.sd %f14,%f15,%f16
+ i2ap1.dd %f16,%f18,%f20
+
+ i2apt.ss %f13,%f14,%f15
+ i2apt.sd %f17,%f18,%f19
+ i2apt.dd %f18,%f20,%f22
+
+ rat1p2.ss %f14,%f15,%f16
+ rat1p2.sd %f20,%f21,%f22
+ rat1p2.dd %f20,%f22,%f24
+
+ m12apm.ss %f15,%f16,%f17
+ m12apm.sd %f23,%f24,%f25
+ m12apm.dd %f22,%f24,%f26
+
+ ra1p2.ss %f18,%f19,%f20
+ ra1p2.sd %f26,%f27,%f28
+ ra1p2.dd %f20,%f22,%f24
+
+ m12ttpa.ss %f19,%f20,%f21
+ m12ttpa.sd %f29,%f30,%f31
+ m12ttpa.dd %f22,%f24,%f26
+
+ iat1p2.ss %f20,%f21,%f22
+ iat1p2.sd %f0,%f1,%f2
+ iat1p2.dd %f24,%f26,%f28
+
+ m12tpm.ss %f21,%f22,%f23
+ m12tpm.sd %f3,%f4,%f5
+ m12tpm.dd %f30,%f0,%f2
+
+ ia1p2.ss %f22,%f23,%f24
+ ia1p2.sd %f6,%f7,%f8
+ ia1p2.dd %f4,%f6,%f8
+
+ m12tpa.ss %f23,%f24,%f25
+ m12tpa.sd %f9,%f10,%f11
+ m12tpa.dd %f6,%f8,%f10
+
+ # pfam with dual bit.
+ d.r2p1.ss %f0,%f1,%f2
+ nop
+ d.r2p1.sd %f3,%f4,%f5
+ nop
+ d.r2p1.dd %f0,%f2,%f4
+ nop
+
+ d.r2pt.ss %f1,%f2,%f3
+ nop
+ d.r2pt.sd %f4,%f5,%f6
+ nop
+ d.r2pt.dd %f2,%f4,%f6
+ nop
+
+ d.r2ap1.ss %f2,%f3,%f4
+ nop
+ d.r2ap1.sd %f6,%f7,%f8
+ nop
+ d.r2ap1.dd %f4,%f6,%f8
+ nop
+
+ d.r2apt.ss %f3,%f4,%f5
+ nop
+ d.r2apt.sd %f7,%f8,%f9
+ nop
+ d.r2apt.dd %f6,%f8,%f10
+ nop
+
+ d.i2p1.ss %f4,%f5,%f6
+ nop
+ d.i2p1.sd %f8,%f9,%f10
+ nop
+ d.i2p1.dd %f12,%f14,%f16
+ nop
+
+ d.i2pt.ss %f7,%f8,%f9
+ nop
+ d.i2pt.sd %f11,%f12,%f13
+ nop
+ d.i2pt.dd %f14,%f16,%f18
+ nop
+
+ d.i2ap1.ss %f10,%f11,%f12
+ nop
+ d.i2ap1.sd %f14,%f15,%f16
+ nop
+ d.i2ap1.dd %f16,%f18,%f20
+ nop
+
+ d.i2apt.ss %f13,%f14,%f15
+ nop
+ d.i2apt.sd %f17,%f18,%f19
+ nop
+ d.i2apt.dd %f18,%f20,%f22
+ nop
+
+ d.rat1p2.ss %f14,%f15,%f16
+ nop
+ d.rat1p2.sd %f20,%f21,%f22
+ nop
+ d.rat1p2.dd %f20,%f22,%f24
+ nop
+
+ d.m12apm.ss %f15,%f16,%f17
+ nop
+ d.m12apm.sd %f23,%f24,%f25
+ nop
+ d.m12apm.dd %f22,%f24,%f26
+ nop
+
+ d.ra1p2.ss %f18,%f19,%f20
+ nop
+ d.ra1p2.sd %f26,%f27,%f28
+ nop
+ d.ra1p2.dd %f20,%f22,%f24
+ nop
+
+ d.m12ttpa.ss %f19,%f20,%f21
+ nop
+ d.m12ttpa.sd %f29,%f30,%f31
+ nop
+ d.m12ttpa.dd %f22,%f24,%f26
+ nop
+
+ d.iat1p2.ss %f20,%f21,%f22
+ nop
+ d.iat1p2.sd %f0,%f1,%f2
+ nop
+ d.iat1p2.dd %f24,%f26,%f28
+ nop
+
+ d.m12tpm.ss %f21,%f22,%f23
+ nop
+ d.m12tpm.sd %f3,%f4,%f5
+ nop
+ d.m12tpm.dd %f30,%f0,%f2
+ nop
+
+ d.ia1p2.ss %f22,%f23,%f24
+ nop
+ d.ia1p2.sd %f6,%f7,%f8
+ nop
+ d.ia1p2.dd %f4,%f6,%f8
+ nop
+
+ d.m12tpa.ss %f23,%f24,%f25
+ nop
+ d.m12tpa.sd %f9,%f10,%f11
+ nop
+ d.m12tpa.dd %f6,%f8,%f10
+ nop
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: pfmam
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 22 48 mr2p1.ss %f0,%f1,%f2
+ 4: 80 18 85 48 mr2p1.sd %f3,%f4,%f5
+ 8: 80 01 44 48 mr2p1.dd %f0,%f2,%f4
+ c: 01 08 43 48 mr2pt.ss %f1,%f2,%f3
+ 10: 81 20 a6 48 mr2pt.sd %f4,%f5,%f6
+ 14: 81 11 86 48 mr2pt.dd %f2,%f4,%f6
+ 18: 02 10 64 48 mr2mp1.ss %f2,%f3,%f4
+ 1c: 82 30 e8 48 mr2mp1.sd %f6,%f7,%f8
+ 20: 82 21 c8 48 mr2mp1.dd %f4,%f6,%f8
+ 24: 03 18 85 48 mr2mpt.ss %f3,%f4,%f5
+ 28: 83 38 09 49 mr2mpt.sd %f7,%f8,%f9
+ 2c: 83 31 0a 49 mr2mpt.dd %f6,%f8,%f10
+ 30: 04 20 a6 48 mi2p1.ss %f4,%f5,%f6
+ 34: 84 40 2a 49 mi2p1.sd %f8,%f9,%f10
+ 38: 84 61 d0 49 mi2p1.dd %f12,%f14,%f16
+ 3c: 05 38 09 49 mi2pt.ss %f7,%f8,%f9
+ 40: 85 58 8d 49 mi2pt.sd %f11,%f12,%f13
+ 44: 85 71 12 4a mi2pt.dd %f14,%f16,%f18
+ 48: 06 50 6c 49 mi2mp1.ss %f10,%f11,%f12
+ 4c: 86 70 f0 49 mi2mp1.sd %f14,%f15,%f16
+ 50: 86 81 54 4a mi2mp1.dd %f16,%f18,%f20
+ 54: 07 68 cf 49 mi2mpt.ss %f13,%f14,%f15
+ 58: 87 88 53 4a mi2mpt.sd %f17,%f18,%f19
+ 5c: 87 91 96 4a mi2mpt.dd %f18,%f20,%f22
+ 60: 08 70 f0 49 mrmt1p2.ss %f14,%f15,%f16
+ 64: 88 a0 b6 4a mrmt1p2.sd %f20,%f21,%f22
+ 68: 88 a1 d8 4a mrmt1p2.dd %f20,%f22,%f24
+ 6c: 09 78 11 4a mm12mpm.ss %f15,%f16,%f17
+ 70: 89 b8 19 4b mm12mpm.sd %f23,%f24,%f25
+ 74: 89 b1 1a 4b mm12mpm.dd %f22,%f24,%f26
+ 78: 0a 90 74 4a mrm1p2.ss %f18,%f19,%f20
+ 7c: 8a d0 7c 4b mrm1p2.sd %f26,%f27,%f28
+ 80: 8a a1 d8 4a mrm1p2.dd %f20,%f22,%f24
+ 84: 0b 98 95 4a mm12ttpm.ss %f19,%f20,%f21
+ 88: 8b e8 df 4b mm12ttpm.sd %f29,%f30,%f31
+ 8c: 8b b1 1a 4b mm12ttpm.dd %f22,%f24,%f26
+ 90: 0c a0 b6 4a mimt1p2.ss %f20,%f21,%f22
+ 94: 8c 00 22 48 mimt1p2.sd %f0,%f1,%f2
+ 98: 8c c1 5c 4b mimt1p2.dd %f24,%f26,%f28
+ 9c: 0d a8 d7 4a mm12tpm.ss %f21,%f22,%f23
+ a0: 8d 18 85 48 mm12tpm.sd %f3,%f4,%f5
+ a4: 8d f1 02 48 mm12tpm.dd %f30,%f0,%f2
+ a8: 0e b0 f8 4a mim1p2.ss %f22,%f23,%f24
+ ac: 8e 30 e8 48 mim1p2.sd %f6,%f7,%f8
+ b0: 8e 21 c8 48 mim1p2.dd %f4,%f6,%f8
+ b4: 0f bc 19 4b m12tpa.ss %f23,%f24,%f25
+ b8: 8f 4c 4b 49 m12tpa.sd %f9,%f10,%f11
+ bc: 8f 35 0a 49 m12tpa.dd %f6,%f8,%f10
+ c0: 00 02 22 48 d.mr2p1.ss %f0,%f1,%f2
+ c4: 00 00 00 a0 shl %r0,%r0,%r0
+ c8: 80 1a 85 48 d.mr2p1.sd %f3,%f4,%f5
+ cc: 00 00 00 a0 shl %r0,%r0,%r0
+ d0: 80 03 44 48 d.mr2p1.dd %f0,%f2,%f4
+ d4: 00 00 00 a0 shl %r0,%r0,%r0
+ d8: 01 0a 43 48 d.mr2pt.ss %f1,%f2,%f3
+ dc: 00 00 00 a0 shl %r0,%r0,%r0
+ e0: 81 22 a6 48 d.mr2pt.sd %f4,%f5,%f6
+ e4: 00 00 00 a0 shl %r0,%r0,%r0
+ e8: 81 13 86 48 d.mr2pt.dd %f2,%f4,%f6
+ ec: 00 00 00 a0 shl %r0,%r0,%r0
+ f0: 02 12 64 48 d.mr2mp1.ss %f2,%f3,%f4
+ f4: 00 00 00 a0 shl %r0,%r0,%r0
+ f8: 82 32 e8 48 d.mr2mp1.sd %f6,%f7,%f8
+ fc: 00 00 00 a0 shl %r0,%r0,%r0
+ 100: 82 23 c8 48 d.mr2mp1.dd %f4,%f6,%f8
+ 104: 00 00 00 a0 shl %r0,%r0,%r0
+ 108: 03 1a 85 48 d.mr2mpt.ss %f3,%f4,%f5
+ 10c: 00 00 00 a0 shl %r0,%r0,%r0
+ 110: 83 3a 09 49 d.mr2mpt.sd %f7,%f8,%f9
+ 114: 00 00 00 a0 shl %r0,%r0,%r0
+ 118: 83 33 0a 49 d.mr2mpt.dd %f6,%f8,%f10
+ 11c: 00 00 00 a0 shl %r0,%r0,%r0
+ 120: 04 22 a6 48 d.mi2p1.ss %f4,%f5,%f6
+ 124: 00 00 00 a0 shl %r0,%r0,%r0
+ 128: 84 42 2a 49 d.mi2p1.sd %f8,%f9,%f10
+ 12c: 00 00 00 a0 shl %r0,%r0,%r0
+ 130: 84 63 d0 49 d.mi2p1.dd %f12,%f14,%f16
+ 134: 00 00 00 a0 shl %r0,%r0,%r0
+ 138: 05 3a 09 49 d.mi2pt.ss %f7,%f8,%f9
+ 13c: 00 00 00 a0 shl %r0,%r0,%r0
+ 140: 85 5a 8d 49 d.mi2pt.sd %f11,%f12,%f13
+ 144: 00 00 00 a0 shl %r0,%r0,%r0
+ 148: 85 73 12 4a d.mi2pt.dd %f14,%f16,%f18
+ 14c: 00 00 00 a0 shl %r0,%r0,%r0
+ 150: 06 52 6c 49 d.mi2mp1.ss %f10,%f11,%f12
+ 154: 00 00 00 a0 shl %r0,%r0,%r0
+ 158: 86 72 f0 49 d.mi2mp1.sd %f14,%f15,%f16
+ 15c: 00 00 00 a0 shl %r0,%r0,%r0
+ 160: 86 83 54 4a d.mi2mp1.dd %f16,%f18,%f20
+ 164: 00 00 00 a0 shl %r0,%r0,%r0
+ 168: 07 6a cf 49 d.mi2mpt.ss %f13,%f14,%f15
+ 16c: 00 00 00 a0 shl %r0,%r0,%r0
+ 170: 87 8a 53 4a d.mi2mpt.sd %f17,%f18,%f19
+ 174: 00 00 00 a0 shl %r0,%r0,%r0
+ 178: 87 93 96 4a d.mi2mpt.dd %f18,%f20,%f22
+ 17c: 00 00 00 a0 shl %r0,%r0,%r0
+ 180: 08 72 f0 49 d.mrmt1p2.ss %f14,%f15,%f16
+ 184: 00 00 00 a0 shl %r0,%r0,%r0
+ 188: 88 a2 b6 4a d.mrmt1p2.sd %f20,%f21,%f22
+ 18c: 00 00 00 a0 shl %r0,%r0,%r0
+ 190: 88 a3 d8 4a d.mrmt1p2.dd %f20,%f22,%f24
+ 194: 00 00 00 a0 shl %r0,%r0,%r0
+ 198: 09 7a 11 4a d.mm12mpm.ss %f15,%f16,%f17
+ 19c: 00 00 00 a0 shl %r0,%r0,%r0
+ 1a0: 89 ba 19 4b d.mm12mpm.sd %f23,%f24,%f25
+ 1a4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1a8: 89 b3 1a 4b d.mm12mpm.dd %f22,%f24,%f26
+ 1ac: 00 00 00 a0 shl %r0,%r0,%r0
+ 1b0: 0a 92 74 4a d.mrm1p2.ss %f18,%f19,%f20
+ 1b4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1b8: 8a d2 7c 4b d.mrm1p2.sd %f26,%f27,%f28
+ 1bc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1c0: 8a a3 d8 4a d.mrm1p2.dd %f20,%f22,%f24
+ 1c4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1c8: 0b 9a 95 4a d.mm12ttpm.ss %f19,%f20,%f21
+ 1cc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1d0: 8b ea df 4b d.mm12ttpm.sd %f29,%f30,%f31
+ 1d4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1d8: 8b b3 1a 4b d.mm12ttpm.dd %f22,%f24,%f26
+ 1dc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1e0: 0c a2 b6 4a d.mimt1p2.ss %f20,%f21,%f22
+ 1e4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1e8: 8c 02 22 48 d.mimt1p2.sd %f0,%f1,%f2
+ 1ec: 00 00 00 a0 shl %r0,%r0,%r0
+ 1f0: 8c c3 5c 4b d.mimt1p2.dd %f24,%f26,%f28
+ 1f4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1f8: 0d aa d7 4a d.mm12tpm.ss %f21,%f22,%f23
+ 1fc: 00 00 00 a0 shl %r0,%r0,%r0
+ 200: 8d 1a 85 48 d.mm12tpm.sd %f3,%f4,%f5
+ 204: 00 00 00 a0 shl %r0,%r0,%r0
+ 208: 8d f3 02 48 d.mm12tpm.dd %f30,%f0,%f2
+ 20c: 00 00 00 a0 shl %r0,%r0,%r0
+ 210: 0e b2 f8 4a d.mim1p2.ss %f22,%f23,%f24
+ 214: 00 00 00 a0 shl %r0,%r0,%r0
+ 218: 8e 32 e8 48 d.mim1p2.sd %f6,%f7,%f8
+ 21c: 00 00 00 a0 shl %r0,%r0,%r0
+ 220: 8e 23 c8 48 d.mim1p2.dd %f4,%f6,%f8
+ 224: 00 00 00 a0 shl %r0,%r0,%r0
+ 228: 0f be 19 4b d.m12tpa.ss %f23,%f24,%f25
+ 22c: 00 00 00 a0 shl %r0,%r0,%r0
+ 230: 8f 4e 4b 49 d.m12tpa.sd %f9,%f10,%f11
+ 234: 00 00 00 a0 shl %r0,%r0,%r0
+ 238: 8f 37 0a 49 d.m12tpa.dd %f6,%f8,%f10
+ 23c: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# pfmam.p family (p={ss,sd,dd})
+
+ .text
+
+ # pfmam without dual bit.
+ mr2p1.ss %f0,%f1,%f2
+ mr2p1.sd %f3,%f4,%f5
+ mr2p1.dd %f0,%f2,%f4
+
+ mr2pt.ss %f1,%f2,%f3
+ mr2pt.sd %f4,%f5,%f6
+ mr2pt.dd %f2,%f4,%f6
+
+ mr2mp1.ss %f2,%f3,%f4
+ mr2mp1.sd %f6,%f7,%f8
+ mr2mp1.dd %f4,%f6,%f8
+
+ mr2mpt.ss %f3,%f4,%f5
+ mr2mpt.sd %f7,%f8,%f9
+ mr2mpt.dd %f6,%f8,%f10
+
+ mi2p1.ss %f4,%f5,%f6
+ mi2p1.sd %f8,%f9,%f10
+ mi2p1.dd %f12,%f14,%f16
+
+ mi2pt.ss %f7,%f8,%f9
+ mi2pt.sd %f11,%f12,%f13
+ mi2pt.dd %f14,%f16,%f18
+
+ mi2mp1.ss %f10,%f11,%f12
+ mi2mp1.sd %f14,%f15,%f16
+ mi2mp1.dd %f16,%f18,%f20
+
+ mi2mpt.ss %f13,%f14,%f15
+ mi2mpt.sd %f17,%f18,%f19
+ mi2mpt.dd %f18,%f20,%f22
+
+ mrmt1p2.ss %f14,%f15,%f16
+ mrmt1p2.sd %f20,%f21,%f22
+ mrmt1p2.dd %f20,%f22,%f24
+
+ mm12mpm.ss %f15,%f16,%f17
+ mm12mpm.sd %f23,%f24,%f25
+ mm12mpm.dd %f22,%f24,%f26
+
+ mrm1p2.ss %f18,%f19,%f20
+ mrm1p2.sd %f26,%f27,%f28
+ mrm1p2.dd %f20,%f22,%f24
+
+ mm12ttpm.ss %f19,%f20,%f21
+ mm12ttpm.sd %f29,%f30,%f31
+ mm12ttpm.dd %f22,%f24,%f26
+
+ mimt1p2.ss %f20,%f21,%f22
+ mimt1p2.sd %f0,%f1,%f2
+ mimt1p2.dd %f24,%f26,%f28
+
+ mm12tpm.ss %f21,%f22,%f23
+ mm12tpm.sd %f3,%f4,%f5
+ mm12tpm.dd %f30,%f0,%f2
+
+ mim1p2.ss %f22,%f23,%f24
+ mim1p2.sd %f6,%f7,%f8
+ mim1p2.dd %f4,%f6,%f8
+
+ m12tpa.ss %f23,%f24,%f25
+ m12tpa.sd %f9,%f10,%f11
+ m12tpa.dd %f6,%f8,%f10
+
+ # pfmam with dual bit.
+ d.mr2p1.ss %f0,%f1,%f2
+ nop
+ d.mr2p1.sd %f3,%f4,%f5
+ nop
+ d.mr2p1.dd %f0,%f2,%f4
+ nop
+
+ d.mr2pt.ss %f1,%f2,%f3
+ nop
+ d.mr2pt.sd %f4,%f5,%f6
+ nop
+ d.mr2pt.dd %f2,%f4,%f6
+ nop
+
+ d.mr2mp1.ss %f2,%f3,%f4
+ nop
+ d.mr2mp1.sd %f6,%f7,%f8
+ nop
+ d.mr2mp1.dd %f4,%f6,%f8
+ nop
+
+ d.mr2mpt.ss %f3,%f4,%f5
+ nop
+ d.mr2mpt.sd %f7,%f8,%f9
+ nop
+ d.mr2mpt.dd %f6,%f8,%f10
+ nop
+
+ d.mi2p1.ss %f4,%f5,%f6
+ nop
+ d.mi2p1.sd %f8,%f9,%f10
+ nop
+ d.mi2p1.dd %f12,%f14,%f16
+ nop
+
+ d.mi2pt.ss %f7,%f8,%f9
+ nop
+ d.mi2pt.sd %f11,%f12,%f13
+ nop
+ d.mi2pt.dd %f14,%f16,%f18
+ nop
+
+ d.mi2mp1.ss %f10,%f11,%f12
+ nop
+ d.mi2mp1.sd %f14,%f15,%f16
+ nop
+ d.mi2mp1.dd %f16,%f18,%f20
+ nop
+
+ d.mi2mpt.ss %f13,%f14,%f15
+ nop
+ d.mi2mpt.sd %f17,%f18,%f19
+ nop
+ d.mi2mpt.dd %f18,%f20,%f22
+ nop
+
+ d.mrmt1p2.ss %f14,%f15,%f16
+ nop
+ d.mrmt1p2.sd %f20,%f21,%f22
+ nop
+ d.mrmt1p2.dd %f20,%f22,%f24
+ nop
+
+ d.mm12mpm.ss %f15,%f16,%f17
+ nop
+ d.mm12mpm.sd %f23,%f24,%f25
+ nop
+ d.mm12mpm.dd %f22,%f24,%f26
+ nop
+
+ d.mrm1p2.ss %f18,%f19,%f20
+ nop
+ d.mrm1p2.sd %f26,%f27,%f28
+ nop
+ d.mrm1p2.dd %f20,%f22,%f24
+ nop
+
+ d.mm12ttpm.ss %f19,%f20,%f21
+ nop
+ d.mm12ttpm.sd %f29,%f30,%f31
+ nop
+ d.mm12ttpm.dd %f22,%f24,%f26
+ nop
+
+ d.mimt1p2.ss %f20,%f21,%f22
+ nop
+ d.mimt1p2.sd %f0,%f1,%f2
+ nop
+ d.mimt1p2.dd %f24,%f26,%f28
+ nop
+
+ d.mm12tpm.ss %f21,%f22,%f23
+ nop
+ d.mm12tpm.sd %f3,%f4,%f5
+ nop
+ d.mm12tpm.dd %f30,%f0,%f2
+ nop
+
+ d.mim1p2.ss %f22,%f23,%f24
+ nop
+ d.mim1p2.sd %f6,%f7,%f8
+ nop
+ d.mim1p2.dd %f4,%f6,%f8
+ nop
+
+ d.m12tpa.ss %f23,%f24,%f25
+ nop
+ d.m12tpa.sd %f9,%f10,%f11
+ nop
+ d.m12tpa.dd %f6,%f8,%f10
+ nop
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: pfmsm
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 10 00 22 48 mr2s1.ss %f0,%f1,%f2
+ 4: 90 18 85 48 mr2s1.sd %f3,%f4,%f5
+ 8: 90 01 44 48 mr2s1.dd %f0,%f2,%f4
+ c: 11 08 43 48 mr2st.ss %f1,%f2,%f3
+ 10: 91 20 a6 48 mr2st.sd %f4,%f5,%f6
+ 14: 91 11 86 48 mr2st.dd %f2,%f4,%f6
+ 18: 12 10 64 48 mr2ms1.ss %f2,%f3,%f4
+ 1c: 92 30 e8 48 mr2ms1.sd %f6,%f7,%f8
+ 20: 92 21 c8 48 mr2ms1.dd %f4,%f6,%f8
+ 24: 13 18 85 48 mr2mst.ss %f3,%f4,%f5
+ 28: 93 38 09 49 mr2mst.sd %f7,%f8,%f9
+ 2c: 93 31 0a 49 mr2mst.dd %f6,%f8,%f10
+ 30: 14 20 a6 48 mi2s1.ss %f4,%f5,%f6
+ 34: 94 40 2a 49 mi2s1.sd %f8,%f9,%f10
+ 38: 94 61 d0 49 mi2s1.dd %f12,%f14,%f16
+ 3c: 15 38 09 49 mi2st.ss %f7,%f8,%f9
+ 40: 95 58 8d 49 mi2st.sd %f11,%f12,%f13
+ 44: 95 71 12 4a mi2st.dd %f14,%f16,%f18
+ 48: 16 50 6c 49 mi2ms1.ss %f10,%f11,%f12
+ 4c: 96 70 f0 49 mi2ms1.sd %f14,%f15,%f16
+ 50: 96 81 54 4a mi2ms1.dd %f16,%f18,%f20
+ 54: 17 68 cf 49 mi2mst.ss %f13,%f14,%f15
+ 58: 97 88 53 4a mi2mst.sd %f17,%f18,%f19
+ 5c: 97 91 96 4a mi2mst.dd %f18,%f20,%f22
+ 60: 18 70 f0 49 mrmt1s2.ss %f14,%f15,%f16
+ 64: 98 a0 b6 4a mrmt1s2.sd %f20,%f21,%f22
+ 68: 98 a1 d8 4a mrmt1s2.dd %f20,%f22,%f24
+ 6c: 19 78 11 4a mm12msm.ss %f15,%f16,%f17
+ 70: 99 b8 19 4b mm12msm.sd %f23,%f24,%f25
+ 74: 99 b1 1a 4b mm12msm.dd %f22,%f24,%f26
+ 78: 1a 90 74 4a mrm1s2.ss %f18,%f19,%f20
+ 7c: 9a d0 7c 4b mrm1s2.sd %f26,%f27,%f28
+ 80: 9a a1 d8 4a mrm1s2.dd %f20,%f22,%f24
+ 84: 1b 98 95 4a mm12ttsm.ss %f19,%f20,%f21
+ 88: 9b e8 df 4b mm12ttsm.sd %f29,%f30,%f31
+ 8c: 9b b1 1a 4b mm12ttsm.dd %f22,%f24,%f26
+ 90: 1c a0 b6 4a mimt1s2.ss %f20,%f21,%f22
+ 94: 9c 00 22 48 mimt1s2.sd %f0,%f1,%f2
+ 98: 9c c1 5c 4b mimt1s2.dd %f24,%f26,%f28
+ 9c: 1d a8 d7 4a mm12tsm.ss %f21,%f22,%f23
+ a0: 9d 18 85 48 mm12tsm.sd %f3,%f4,%f5
+ a4: 9d f1 02 48 mm12tsm.dd %f30,%f0,%f2
+ a8: 1e b0 f8 4a mim1s2.ss %f22,%f23,%f24
+ ac: 9e 30 e8 48 mim1s2.sd %f6,%f7,%f8
+ b0: 9e 21 c8 48 mim1s2.dd %f4,%f6,%f8
+ b4: 1f bc 19 4b m12tsa.ss %f23,%f24,%f25
+ b8: 9f 4c 4b 49 m12tsa.sd %f9,%f10,%f11
+ bc: 9f 35 0a 49 m12tsa.dd %f6,%f8,%f10
+ c0: 10 02 22 48 d.mr2s1.ss %f0,%f1,%f2
+ c4: 00 00 00 a0 shl %r0,%r0,%r0
+ c8: 90 1a 85 48 d.mr2s1.sd %f3,%f4,%f5
+ cc: 00 00 00 a0 shl %r0,%r0,%r0
+ d0: 90 03 44 48 d.mr2s1.dd %f0,%f2,%f4
+ d4: 00 00 00 a0 shl %r0,%r0,%r0
+ d8: 11 0a 43 48 d.mr2st.ss %f1,%f2,%f3
+ dc: 00 00 00 a0 shl %r0,%r0,%r0
+ e0: 91 22 a6 48 d.mr2st.sd %f4,%f5,%f6
+ e4: 00 00 00 a0 shl %r0,%r0,%r0
+ e8: 91 13 86 48 d.mr2st.dd %f2,%f4,%f6
+ ec: 00 00 00 a0 shl %r0,%r0,%r0
+ f0: 12 12 64 48 d.mr2ms1.ss %f2,%f3,%f4
+ f4: 00 00 00 a0 shl %r0,%r0,%r0
+ f8: 92 32 e8 48 d.mr2ms1.sd %f6,%f7,%f8
+ fc: 00 00 00 a0 shl %r0,%r0,%r0
+ 100: 92 23 c8 48 d.mr2ms1.dd %f4,%f6,%f8
+ 104: 00 00 00 a0 shl %r0,%r0,%r0
+ 108: 13 1a 85 48 d.mr2mst.ss %f3,%f4,%f5
+ 10c: 00 00 00 a0 shl %r0,%r0,%r0
+ 110: 93 3a 09 49 d.mr2mst.sd %f7,%f8,%f9
+ 114: 00 00 00 a0 shl %r0,%r0,%r0
+ 118: 93 33 0a 49 d.mr2mst.dd %f6,%f8,%f10
+ 11c: 00 00 00 a0 shl %r0,%r0,%r0
+ 120: 14 22 a6 48 d.mi2s1.ss %f4,%f5,%f6
+ 124: 00 00 00 a0 shl %r0,%r0,%r0
+ 128: 94 42 2a 49 d.mi2s1.sd %f8,%f9,%f10
+ 12c: 00 00 00 a0 shl %r0,%r0,%r0
+ 130: 94 63 d0 49 d.mi2s1.dd %f12,%f14,%f16
+ 134: 00 00 00 a0 shl %r0,%r0,%r0
+ 138: 15 3a 09 49 d.mi2st.ss %f7,%f8,%f9
+ 13c: 00 00 00 a0 shl %r0,%r0,%r0
+ 140: 95 5a 8d 49 d.mi2st.sd %f11,%f12,%f13
+ 144: 00 00 00 a0 shl %r0,%r0,%r0
+ 148: 95 73 12 4a d.mi2st.dd %f14,%f16,%f18
+ 14c: 00 00 00 a0 shl %r0,%r0,%r0
+ 150: 16 52 6c 49 d.mi2ms1.ss %f10,%f11,%f12
+ 154: 00 00 00 a0 shl %r0,%r0,%r0
+ 158: 96 72 f0 49 d.mi2ms1.sd %f14,%f15,%f16
+ 15c: 00 00 00 a0 shl %r0,%r0,%r0
+ 160: 96 83 54 4a d.mi2ms1.dd %f16,%f18,%f20
+ 164: 00 00 00 a0 shl %r0,%r0,%r0
+ 168: 17 6a cf 49 d.mi2mst.ss %f13,%f14,%f15
+ 16c: 00 00 00 a0 shl %r0,%r0,%r0
+ 170: 97 8a 53 4a d.mi2mst.sd %f17,%f18,%f19
+ 174: 00 00 00 a0 shl %r0,%r0,%r0
+ 178: 97 93 96 4a d.mi2mst.dd %f18,%f20,%f22
+ 17c: 00 00 00 a0 shl %r0,%r0,%r0
+ 180: 18 72 f0 49 d.mrmt1s2.ss %f14,%f15,%f16
+ 184: 00 00 00 a0 shl %r0,%r0,%r0
+ 188: 98 a2 b6 4a d.mrmt1s2.sd %f20,%f21,%f22
+ 18c: 00 00 00 a0 shl %r0,%r0,%r0
+ 190: 98 a3 d8 4a d.mrmt1s2.dd %f20,%f22,%f24
+ 194: 00 00 00 a0 shl %r0,%r0,%r0
+ 198: 19 7a 11 4a d.mm12msm.ss %f15,%f16,%f17
+ 19c: 00 00 00 a0 shl %r0,%r0,%r0
+ 1a0: 99 ba 19 4b d.mm12msm.sd %f23,%f24,%f25
+ 1a4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1a8: 99 b3 1a 4b d.mm12msm.dd %f22,%f24,%f26
+ 1ac: 00 00 00 a0 shl %r0,%r0,%r0
+ 1b0: 1a 92 74 4a d.mrm1s2.ss %f18,%f19,%f20
+ 1b4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1b8: 9a d2 7c 4b d.mrm1s2.sd %f26,%f27,%f28
+ 1bc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1c0: 9a a3 d8 4a d.mrm1s2.dd %f20,%f22,%f24
+ 1c4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1c8: 1b 9a 95 4a d.mm12ttsm.ss %f19,%f20,%f21
+ 1cc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1d0: 9b ea df 4b d.mm12ttsm.sd %f29,%f30,%f31
+ 1d4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1d8: 9b b3 1a 4b d.mm12ttsm.dd %f22,%f24,%f26
+ 1dc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1e0: 1c a2 b6 4a d.mimt1s2.ss %f20,%f21,%f22
+ 1e4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1e8: 9c 02 22 48 d.mimt1s2.sd %f0,%f1,%f2
+ 1ec: 00 00 00 a0 shl %r0,%r0,%r0
+ 1f0: 9c c3 5c 4b d.mimt1s2.dd %f24,%f26,%f28
+ 1f4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1f8: 1d aa d7 4a d.mm12tsm.ss %f21,%f22,%f23
+ 1fc: 00 00 00 a0 shl %r0,%r0,%r0
+ 200: 9d 1a 85 48 d.mm12tsm.sd %f3,%f4,%f5
+ 204: 00 00 00 a0 shl %r0,%r0,%r0
+ 208: 9d f3 02 48 d.mm12tsm.dd %f30,%f0,%f2
+ 20c: 00 00 00 a0 shl %r0,%r0,%r0
+ 210: 1e b2 f8 4a d.mim1s2.ss %f22,%f23,%f24
+ 214: 00 00 00 a0 shl %r0,%r0,%r0
+ 218: 9e 32 e8 48 d.mim1s2.sd %f6,%f7,%f8
+ 21c: 00 00 00 a0 shl %r0,%r0,%r0
+ 220: 9e 23 c8 48 d.mim1s2.dd %f4,%f6,%f8
+ 224: 00 00 00 a0 shl %r0,%r0,%r0
+ 228: 1f be 19 4b d.m12tsa.ss %f23,%f24,%f25
+ 22c: 00 00 00 a0 shl %r0,%r0,%r0
+ 230: 9f 4e 4b 49 d.m12tsa.sd %f9,%f10,%f11
+ 234: 00 00 00 a0 shl %r0,%r0,%r0
+ 238: 9f 37 0a 49 d.m12tsa.dd %f6,%f8,%f10
+ 23c: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# pfmsm.p family (p={ss,sd,dd})
+
+ .text
+
+ # pfmsm without dual bit
+ mr2s1.ss %f0,%f1,%f2
+ mr2s1.sd %f3,%f4,%f5
+ mr2s1.dd %f0,%f2,%f4
+
+ mr2st.ss %f1,%f2,%f3
+ mr2st.sd %f4,%f5,%f6
+ mr2st.dd %f2,%f4,%f6
+
+ mr2ms1.ss %f2,%f3,%f4
+ mr2ms1.sd %f6,%f7,%f8
+ mr2ms1.dd %f4,%f6,%f8
+
+ mr2mst.ss %f3,%f4,%f5
+ mr2mst.sd %f7,%f8,%f9
+ mr2mst.dd %f6,%f8,%f10
+
+ mi2s1.ss %f4,%f5,%f6
+ mi2s1.sd %f8,%f9,%f10
+ mi2s1.dd %f12,%f14,%f16
+
+ mi2st.ss %f7,%f8,%f9
+ mi2st.sd %f11,%f12,%f13
+ mi2st.dd %f14,%f16,%f18
+
+ mi2ms1.ss %f10,%f11,%f12
+ mi2ms1.sd %f14,%f15,%f16
+ mi2ms1.dd %f16,%f18,%f20
+
+ mi2mst.ss %f13,%f14,%f15
+ mi2mst.sd %f17,%f18,%f19
+ mi2mst.dd %f18,%f20,%f22
+
+ mrmt1s2.ss %f14,%f15,%f16
+ mrmt1s2.sd %f20,%f21,%f22
+ mrmt1s2.dd %f20,%f22,%f24
+
+ mm12msm.ss %f15,%f16,%f17
+ mm12msm.sd %f23,%f24,%f25
+ mm12msm.dd %f22,%f24,%f26
+
+ mrm1s2.ss %f18,%f19,%f20
+ mrm1s2.sd %f26,%f27,%f28
+ mrm1s2.dd %f20,%f22,%f24
+
+ mm12ttsm.ss %f19,%f20,%f21
+ mm12ttsm.sd %f29,%f30,%f31
+ mm12ttsm.dd %f22,%f24,%f26
+
+ mimt1s2.ss %f20,%f21,%f22
+ mimt1s2.sd %f0,%f1,%f2
+ mimt1s2.dd %f24,%f26,%f28
+
+ mm12tsm.ss %f21,%f22,%f23
+ mm12tsm.sd %f3,%f4,%f5
+ mm12tsm.dd %f30,%f0,%f2
+
+ mim1s2.ss %f22,%f23,%f24
+ mim1s2.sd %f6,%f7,%f8
+ mim1s2.dd %f4,%f6,%f8
+
+ m12tsa.ss %f23,%f24,%f25
+ m12tsa.sd %f9,%f10,%f11
+ m12tsa.dd %f6,%f8,%f10
+
+ # pfmsm with dual bit
+ d.mr2s1.ss %f0,%f1,%f2
+ nop
+ d.mr2s1.sd %f3,%f4,%f5
+ nop
+ d.mr2s1.dd %f0,%f2,%f4
+ nop
+
+ d.mr2st.ss %f1,%f2,%f3
+ nop
+ d.mr2st.sd %f4,%f5,%f6
+ nop
+ d.mr2st.dd %f2,%f4,%f6
+ nop
+
+ d.mr2ms1.ss %f2,%f3,%f4
+ nop
+ d.mr2ms1.sd %f6,%f7,%f8
+ nop
+ d.mr2ms1.dd %f4,%f6,%f8
+ nop
+
+ d.mr2mst.ss %f3,%f4,%f5
+ nop
+ d.mr2mst.sd %f7,%f8,%f9
+ nop
+ d.mr2mst.dd %f6,%f8,%f10
+ nop
+
+ d.mi2s1.ss %f4,%f5,%f6
+ nop
+ d.mi2s1.sd %f8,%f9,%f10
+ nop
+ d.mi2s1.dd %f12,%f14,%f16
+ nop
+
+ d.mi2st.ss %f7,%f8,%f9
+ nop
+ d.mi2st.sd %f11,%f12,%f13
+ nop
+ d.mi2st.dd %f14,%f16,%f18
+ nop
+
+ d.mi2ms1.ss %f10,%f11,%f12
+ nop
+ d.mi2ms1.sd %f14,%f15,%f16
+ nop
+ d.mi2ms1.dd %f16,%f18,%f20
+ nop
+
+ d.mi2mst.ss %f13,%f14,%f15
+ nop
+ d.mi2mst.sd %f17,%f18,%f19
+ nop
+ d.mi2mst.dd %f18,%f20,%f22
+ nop
+
+ d.mrmt1s2.ss %f14,%f15,%f16
+ nop
+ d.mrmt1s2.sd %f20,%f21,%f22
+ nop
+ d.mrmt1s2.dd %f20,%f22,%f24
+ nop
+
+ d.mm12msm.ss %f15,%f16,%f17
+ nop
+ d.mm12msm.sd %f23,%f24,%f25
+ nop
+ d.mm12msm.dd %f22,%f24,%f26
+ nop
+
+ d.mrm1s2.ss %f18,%f19,%f20
+ nop
+ d.mrm1s2.sd %f26,%f27,%f28
+ nop
+ d.mrm1s2.dd %f20,%f22,%f24
+ nop
+
+ d.mm12ttsm.ss %f19,%f20,%f21
+ nop
+ d.mm12ttsm.sd %f29,%f30,%f31
+ nop
+ d.mm12ttsm.dd %f22,%f24,%f26
+ nop
+
+ d.mimt1s2.ss %f20,%f21,%f22
+ nop
+ d.mimt1s2.sd %f0,%f1,%f2
+ nop
+ d.mimt1s2.dd %f24,%f26,%f28
+ nop
+
+ d.mm12tsm.ss %f21,%f22,%f23
+ nop
+ d.mm12tsm.sd %f3,%f4,%f5
+ nop
+ d.mm12tsm.dd %f30,%f0,%f2
+ nop
+
+ d.mim1s2.ss %f22,%f23,%f24
+ nop
+ d.mim1s2.sd %f6,%f7,%f8
+ nop
+ d.mim1s2.dd %f4,%f6,%f8
+ nop
+
+ d.m12tsa.ss %f23,%f24,%f25
+ nop
+ d.m12tsa.sd %f9,%f10,%f11
+ nop
+ d.m12tsa.dd %f6,%f8,%f10
+ nop
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: pfsm
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 10 04 22 48 r2s1.ss %f0,%f1,%f2
+ 4: 90 1c 85 48 r2s1.sd %f3,%f4,%f5
+ 8: 90 05 44 48 r2s1.dd %f0,%f2,%f4
+ c: 11 0c 43 48 r2st.ss %f1,%f2,%f3
+ 10: 91 24 a6 48 r2st.sd %f4,%f5,%f6
+ 14: 91 15 86 48 r2st.dd %f2,%f4,%f6
+ 18: 12 14 64 48 r2as1.ss %f2,%f3,%f4
+ 1c: 92 34 e8 48 r2as1.sd %f6,%f7,%f8
+ 20: 92 25 c8 48 r2as1.dd %f4,%f6,%f8
+ 24: 13 1c 85 48 r2ast.ss %f3,%f4,%f5
+ 28: 93 3c 09 49 r2ast.sd %f7,%f8,%f9
+ 2c: 93 35 0a 49 r2ast.dd %f6,%f8,%f10
+ 30: 14 24 a6 48 i2s1.ss %f4,%f5,%f6
+ 34: 94 44 2a 49 i2s1.sd %f8,%f9,%f10
+ 38: 94 65 d0 49 i2s1.dd %f12,%f14,%f16
+ 3c: 15 3c 09 49 i2st.ss %f7,%f8,%f9
+ 40: 95 5c 8d 49 i2st.sd %f11,%f12,%f13
+ 44: 95 75 12 4a i2st.dd %f14,%f16,%f18
+ 48: 16 54 6c 49 i2as1.ss %f10,%f11,%f12
+ 4c: 96 74 f0 49 i2as1.sd %f14,%f15,%f16
+ 50: 96 85 54 4a i2as1.dd %f16,%f18,%f20
+ 54: 17 6c cf 49 i2ast.ss %f13,%f14,%f15
+ 58: 97 8c 53 4a i2ast.sd %f17,%f18,%f19
+ 5c: 97 95 96 4a i2ast.dd %f18,%f20,%f22
+ 60: 18 74 f0 49 rat1s2.ss %f14,%f15,%f16
+ 64: 98 a4 b6 4a rat1s2.sd %f20,%f21,%f22
+ 68: 98 a5 d8 4a rat1s2.dd %f20,%f22,%f24
+ 6c: 19 7c 11 4a m12asm.ss %f15,%f16,%f17
+ 70: 99 bc 19 4b m12asm.sd %f23,%f24,%f25
+ 74: 99 b5 1a 4b m12asm.dd %f22,%f24,%f26
+ 78: 1a 94 74 4a ra1s2.ss %f18,%f19,%f20
+ 7c: 9a d4 7c 4b ra1s2.sd %f26,%f27,%f28
+ 80: 9a a5 d8 4a ra1s2.dd %f20,%f22,%f24
+ 84: 1b 9c 95 4a m12ttsa.ss %f19,%f20,%f21
+ 88: 9b ec df 4b m12ttsa.sd %f29,%f30,%f31
+ 8c: 9b b5 1a 4b m12ttsa.dd %f22,%f24,%f26
+ 90: 1c a4 b6 4a iat1s2.ss %f20,%f21,%f22
+ 94: 9c 04 22 48 iat1s2.sd %f0,%f1,%f2
+ 98: 9c c5 5c 4b iat1s2.dd %f24,%f26,%f28
+ 9c: 1d ac d7 4a m12tsm.ss %f21,%f22,%f23
+ a0: 9d 1c 85 48 m12tsm.sd %f3,%f4,%f5
+ a4: 9d f5 02 48 m12tsm.dd %f30,%f0,%f2
+ a8: 1e b4 f8 4a ia1s2.ss %f22,%f23,%f24
+ ac: 9e 34 e8 48 ia1s2.sd %f6,%f7,%f8
+ b0: 9e 25 c8 48 ia1s2.dd %f4,%f6,%f8
+ b4: 1f bc 19 4b m12tsa.ss %f23,%f24,%f25
+ b8: 9f 4c 4b 49 m12tsa.sd %f9,%f10,%f11
+ bc: 9f 35 0a 49 m12tsa.dd %f6,%f8,%f10
+ c0: 10 06 22 48 d.r2s1.ss %f0,%f1,%f2
+ c4: 00 00 00 a0 shl %r0,%r0,%r0
+ c8: 90 1e 85 48 d.r2s1.sd %f3,%f4,%f5
+ cc: 00 00 00 a0 shl %r0,%r0,%r0
+ d0: 90 07 44 48 d.r2s1.dd %f0,%f2,%f4
+ d4: 00 00 00 a0 shl %r0,%r0,%r0
+ d8: 11 0e 43 48 d.r2st.ss %f1,%f2,%f3
+ dc: 00 00 00 a0 shl %r0,%r0,%r0
+ e0: 91 26 a6 48 d.r2st.sd %f4,%f5,%f6
+ e4: 00 00 00 a0 shl %r0,%r0,%r0
+ e8: 91 17 86 48 d.r2st.dd %f2,%f4,%f6
+ ec: 00 00 00 a0 shl %r0,%r0,%r0
+ f0: 12 16 64 48 d.r2as1.ss %f2,%f3,%f4
+ f4: 00 00 00 a0 shl %r0,%r0,%r0
+ f8: 92 36 e8 48 d.r2as1.sd %f6,%f7,%f8
+ fc: 00 00 00 a0 shl %r0,%r0,%r0
+ 100: 92 27 c8 48 d.r2as1.dd %f4,%f6,%f8
+ 104: 00 00 00 a0 shl %r0,%r0,%r0
+ 108: 13 1e 85 48 d.r2ast.ss %f3,%f4,%f5
+ 10c: 00 00 00 a0 shl %r0,%r0,%r0
+ 110: 93 3e 09 49 d.r2ast.sd %f7,%f8,%f9
+ 114: 00 00 00 a0 shl %r0,%r0,%r0
+ 118: 93 37 0a 49 d.r2ast.dd %f6,%f8,%f10
+ 11c: 00 00 00 a0 shl %r0,%r0,%r0
+ 120: 14 26 a6 48 d.i2s1.ss %f4,%f5,%f6
+ 124: 00 00 00 a0 shl %r0,%r0,%r0
+ 128: 94 46 2a 49 d.i2s1.sd %f8,%f9,%f10
+ 12c: 00 00 00 a0 shl %r0,%r0,%r0
+ 130: 94 67 d0 49 d.i2s1.dd %f12,%f14,%f16
+ 134: 00 00 00 a0 shl %r0,%r0,%r0
+ 138: 15 3e 09 49 d.i2st.ss %f7,%f8,%f9
+ 13c: 00 00 00 a0 shl %r0,%r0,%r0
+ 140: 95 5e 8d 49 d.i2st.sd %f11,%f12,%f13
+ 144: 00 00 00 a0 shl %r0,%r0,%r0
+ 148: 95 77 12 4a d.i2st.dd %f14,%f16,%f18
+ 14c: 00 00 00 a0 shl %r0,%r0,%r0
+ 150: 16 56 6c 49 d.i2as1.ss %f10,%f11,%f12
+ 154: 00 00 00 a0 shl %r0,%r0,%r0
+ 158: 96 76 f0 49 d.i2as1.sd %f14,%f15,%f16
+ 15c: 00 00 00 a0 shl %r0,%r0,%r0
+ 160: 96 87 54 4a d.i2as1.dd %f16,%f18,%f20
+ 164: 00 00 00 a0 shl %r0,%r0,%r0
+ 168: 17 6e cf 49 d.i2ast.ss %f13,%f14,%f15
+ 16c: 00 00 00 a0 shl %r0,%r0,%r0
+ 170: 97 8e 53 4a d.i2ast.sd %f17,%f18,%f19
+ 174: 00 00 00 a0 shl %r0,%r0,%r0
+ 178: 97 97 96 4a d.i2ast.dd %f18,%f20,%f22
+ 17c: 00 00 00 a0 shl %r0,%r0,%r0
+ 180: 18 76 f0 49 d.rat1s2.ss %f14,%f15,%f16
+ 184: 00 00 00 a0 shl %r0,%r0,%r0
+ 188: 98 a6 b6 4a d.rat1s2.sd %f20,%f21,%f22
+ 18c: 00 00 00 a0 shl %r0,%r0,%r0
+ 190: 98 a7 d8 4a d.rat1s2.dd %f20,%f22,%f24
+ 194: 00 00 00 a0 shl %r0,%r0,%r0
+ 198: 19 7e 11 4a d.m12asm.ss %f15,%f16,%f17
+ 19c: 00 00 00 a0 shl %r0,%r0,%r0
+ 1a0: 99 be 19 4b d.m12asm.sd %f23,%f24,%f25
+ 1a4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1a8: 99 b7 1a 4b d.m12asm.dd %f22,%f24,%f26
+ 1ac: 00 00 00 a0 shl %r0,%r0,%r0
+ 1b0: 1a 96 74 4a d.ra1s2.ss %f18,%f19,%f20
+ 1b4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1b8: 9a d6 7c 4b d.ra1s2.sd %f26,%f27,%f28
+ 1bc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1c0: 9a a7 d8 4a d.ra1s2.dd %f20,%f22,%f24
+ 1c4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1c8: 1b 9e 95 4a d.m12ttsa.ss %f19,%f20,%f21
+ 1cc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1d0: 9b ee df 4b d.m12ttsa.sd %f29,%f30,%f31
+ 1d4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1d8: 9b b7 1a 4b d.m12ttsa.dd %f22,%f24,%f26
+ 1dc: 00 00 00 a0 shl %r0,%r0,%r0
+ 1e0: 1c a6 b6 4a d.iat1s2.ss %f20,%f21,%f22
+ 1e4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1e8: 9c 06 22 48 d.iat1s2.sd %f0,%f1,%f2
+ 1ec: 00 00 00 a0 shl %r0,%r0,%r0
+ 1f0: 9c c7 5c 4b d.iat1s2.dd %f24,%f26,%f28
+ 1f4: 00 00 00 a0 shl %r0,%r0,%r0
+ 1f8: 1d ae d7 4a d.m12tsm.ss %f21,%f22,%f23
+ 1fc: 00 00 00 a0 shl %r0,%r0,%r0
+ 200: 9d 1e 85 48 d.m12tsm.sd %f3,%f4,%f5
+ 204: 00 00 00 a0 shl %r0,%r0,%r0
+ 208: 9d f7 02 48 d.m12tsm.dd %f30,%f0,%f2
+ 20c: 00 00 00 a0 shl %r0,%r0,%r0
+ 210: 1e b6 f8 4a d.ia1s2.ss %f22,%f23,%f24
+ 214: 00 00 00 a0 shl %r0,%r0,%r0
+ 218: 9e 36 e8 48 d.ia1s2.sd %f6,%f7,%f8
+ 21c: 00 00 00 a0 shl %r0,%r0,%r0
+ 220: 9e 27 c8 48 d.ia1s2.dd %f4,%f6,%f8
+ 224: 00 00 00 a0 shl %r0,%r0,%r0
+ 228: 1f be 19 4b d.m12tsa.ss %f23,%f24,%f25
+ 22c: 00 00 00 a0 shl %r0,%r0,%r0
+ 230: 9f 4e 4b 49 d.m12tsa.sd %f9,%f10,%f11
+ 234: 00 00 00 a0 shl %r0,%r0,%r0
+ 238: 9f 37 0a 49 d.m12tsa.dd %f6,%f8,%f10
+ 23c: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# pfsm.p family (p={ss,sd,dd})
+
+ .text
+
+ # pfsm without dual bit
+ r2s1.ss %f0,%f1,%f2
+ r2s1.sd %f3,%f4,%f5
+ r2s1.dd %f0,%f2,%f4
+
+ r2st.ss %f1,%f2,%f3
+ r2st.sd %f4,%f5,%f6
+ r2st.dd %f2,%f4,%f6
+
+ r2as1.ss %f2,%f3,%f4
+ r2as1.sd %f6,%f7,%f8
+ r2as1.dd %f4,%f6,%f8
+
+ r2ast.ss %f3,%f4,%f5
+ r2ast.sd %f7,%f8,%f9
+ r2ast.dd %f6,%f8,%f10
+
+ i2s1.ss %f4,%f5,%f6
+ i2s1.sd %f8,%f9,%f10
+ i2s1.dd %f12,%f14,%f16
+
+ i2st.ss %f7,%f8,%f9
+ i2st.sd %f11,%f12,%f13
+ i2st.dd %f14,%f16,%f18
+
+ i2as1.ss %f10,%f11,%f12
+ i2as1.sd %f14,%f15,%f16
+ i2as1.dd %f16,%f18,%f20
+
+ i2ast.ss %f13,%f14,%f15
+ i2ast.sd %f17,%f18,%f19
+ i2ast.dd %f18,%f20,%f22
+
+ rat1s2.ss %f14,%f15,%f16
+ rat1s2.sd %f20,%f21,%f22
+ rat1s2.dd %f20,%f22,%f24
+
+ m12asm.ss %f15,%f16,%f17
+ m12asm.sd %f23,%f24,%f25
+ m12asm.dd %f22,%f24,%f26
+
+ ra1s2.ss %f18,%f19,%f20
+ ra1s2.sd %f26,%f27,%f28
+ ra1s2.dd %f20,%f22,%f24
+
+ m12ttsa.ss %f19,%f20,%f21
+ m12ttsa.sd %f29,%f30,%f31
+ m12ttsa.dd %f22,%f24,%f26
+
+ iat1s2.ss %f20,%f21,%f22
+ iat1s2.sd %f0,%f1,%f2
+ iat1s2.dd %f24,%f26,%f28
+
+ m12tsm.ss %f21,%f22,%f23
+ m12tsm.sd %f3,%f4,%f5
+ m12tsm.dd %f30,%f0,%f2
+
+ ia1s2.ss %f22,%f23,%f24
+ ia1s2.sd %f6,%f7,%f8
+ ia1s2.dd %f4,%f6,%f8
+
+ m12tsa.ss %f23,%f24,%f25
+ m12tsa.sd %f9,%f10,%f11
+ m12tsa.dd %f6,%f8,%f10
+
+ # pfsm with dual bit
+ d.r2s1.ss %f0,%f1,%f2
+ nop
+ d.r2s1.sd %f3,%f4,%f5
+ nop
+ d.r2s1.dd %f0,%f2,%f4
+ nop
+
+ d.r2st.ss %f1,%f2,%f3
+ nop
+ d.r2st.sd %f4,%f5,%f6
+ nop
+ d.r2st.dd %f2,%f4,%f6
+ nop
+
+ d.r2as1.ss %f2,%f3,%f4
+ nop
+ d.r2as1.sd %f6,%f7,%f8
+ nop
+ d.r2as1.dd %f4,%f6,%f8
+ nop
+
+ d.r2ast.ss %f3,%f4,%f5
+ nop
+ d.r2ast.sd %f7,%f8,%f9
+ nop
+ d.r2ast.dd %f6,%f8,%f10
+ nop
+
+ d.i2s1.ss %f4,%f5,%f6
+ nop
+ d.i2s1.sd %f8,%f9,%f10
+ nop
+ d.i2s1.dd %f12,%f14,%f16
+ nop
+
+ d.i2st.ss %f7,%f8,%f9
+ nop
+ d.i2st.sd %f11,%f12,%f13
+ nop
+ d.i2st.dd %f14,%f16,%f18
+ nop
+
+ d.i2as1.ss %f10,%f11,%f12
+ nop
+ d.i2as1.sd %f14,%f15,%f16
+ nop
+ d.i2as1.dd %f16,%f18,%f20
+ nop
+
+ d.i2ast.ss %f13,%f14,%f15
+ nop
+ d.i2ast.sd %f17,%f18,%f19
+ nop
+ d.i2ast.dd %f18,%f20,%f22
+ nop
+
+ d.rat1s2.ss %f14,%f15,%f16
+ nop
+ d.rat1s2.sd %f20,%f21,%f22
+ nop
+ d.rat1s2.dd %f20,%f22,%f24
+ nop
+
+ d.m12asm.ss %f15,%f16,%f17
+ nop
+ d.m12asm.sd %f23,%f24,%f25
+ nop
+ d.m12asm.dd %f22,%f24,%f26
+ nop
+
+ d.ra1s2.ss %f18,%f19,%f20
+ nop
+ d.ra1s2.sd %f26,%f27,%f28
+ nop
+ d.ra1s2.dd %f20,%f22,%f24
+ nop
+
+ d.m12ttsa.ss %f19,%f20,%f21
+ nop
+ d.m12ttsa.sd %f29,%f30,%f31
+ nop
+ d.m12ttsa.dd %f22,%f24,%f26
+ nop
+
+ d.iat1s2.ss %f20,%f21,%f22
+ nop
+ d.iat1s2.sd %f0,%f1,%f2
+ nop
+ d.iat1s2.dd %f24,%f26,%f28
+ nop
+
+ d.m12tsm.ss %f21,%f22,%f23
+ nop
+ d.m12tsm.sd %f3,%f4,%f5
+ nop
+ d.m12tsm.dd %f30,%f0,%f2
+ nop
+
+ d.ia1s2.ss %f22,%f23,%f24
+ nop
+ d.ia1s2.sd %f6,%f7,%f8
+ nop
+ d.ia1s2.dd %f4,%f6,%f8
+ nop
+
+ d.m12tsa.ss %f23,%f24,%f25
+ nop
+ d.m12tsa.sd %f9,%f10,%f11
+ nop
+ d.m12tsa.dd %f6,%f8,%f10
+ nop
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: regress01
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: f2 ff 50 2c fst.l %f16,-16\(%sp\)
+ 4: f2 ff 54 2c fst.l %f20,-16\(%sp\)
+ 8: f2 ff 58 2c fst.l %f24,-16\(%sp\)
+ c: f3 ff 50 2c fst.l %f16,-16\(%sp\)\+\+
+ 10: f3 ff 54 2c fst.l %f20,-16\(%sp\)\+\+
+ 14: f3 ff 58 2c fst.l %f24,-16\(%sp\)\+\+
+ 18: f4 ff 50 2c fst.q %f16,-16\(%sp\)
+ 1c: f4 ff 54 2c fst.q %f20,-16\(%sp\)
+ 20: f4 ff 58 2c fst.q %f24,-16\(%sp\)
+ 24: f5 ff 50 2c fst.q %f16,-16\(%sp\)\+\+
+ 28: f5 ff 54 2c fst.q %f20,-16\(%sp\)\+\+
+ 2c: f5 ff 58 2c fst.q %f24,-16\(%sp\)\+\+
--- /dev/null
+# Test fst.* with and without auto-increment.
+
+ .text
+
+ fst.l %f16,-16(%sp)
+ fst.l %f20,-16(%sp)
+ fst.l %f24,-16(%sp)
+
+ fst.l %f16,-16(%sp)++
+ fst.l %f20,-16(%sp)++
+ fst.l %f24,-16(%sp)++
+
+ fst.q %f16,-16(%sp)
+ fst.q %f20,-16(%sp)
+ fst.q %f24,-16(%sp)
+
+ fst.q %f16,-16(%sp)++
+ fst.q %f20,-16(%sp)++
+ fst.q %f24,-16(%sp)++
--- /dev/null
+#as:
+#objdump: -dr
+#name: shift
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: 00 00 22 a0 shl %r0,%r1,%sp
+ 4: 00 18 85 a0 shl %fp,%r4,%r5
+ 8: 00 30 e8 a0 shl %r6,%r7,%r8
+ c: 00 48 4b a1 shl %r9,%r10,%r11
+ 10: 00 f8 ae a1 shl %r31,%r13,%r14
+ 14: 00 78 11 a2 shl %r15,%r16,%r17
+ 18: 00 90 74 a2 shl %r18,%r19,%r20
+ 1c: 00 a8 d7 a2 shl %r21,%r22,%r23
+ 20: 00 c0 3f a3 shl %r24,%r25,%r31
+ 24: 00 d8 9d a3 shl %r27,%r28,%r29
+ 28: 00 f0 e0 a3 shl %r30,%r31,%r0
+ 2c: 00 00 22 a8 shr %r0,%r1,%sp
+ 30: 00 18 85 a8 shr %fp,%r4,%r5
+ 34: 00 30 e8 a8 shr %r6,%r7,%r8
+ 38: 00 48 4b a9 shr %r9,%r10,%r11
+ 3c: 00 f8 ae a9 shr %r31,%r13,%r14
+ 40: 00 78 11 aa shr %r15,%r16,%r17
+ 44: 00 90 74 aa shr %r18,%r19,%r20
+ 48: 00 a8 d7 aa shr %r21,%r22,%r23
+ 4c: 00 c0 3f ab shr %r24,%r25,%r31
+ 50: 00 d8 9d ab shr %r27,%r28,%r29
+ 54: 00 f0 e0 ab shr %r30,%r31,%r0
+ 58: 00 00 22 b8 shra %r0,%r1,%sp
+ 5c: 00 18 85 b8 shra %fp,%r4,%r5
+ 60: 00 30 e8 b8 shra %r6,%r7,%r8
+ 64: 00 48 4b b9 shra %r9,%r10,%r11
+ 68: 00 f8 ae b9 shra %r31,%r13,%r14
+ 6c: 00 78 11 ba shra %r15,%r16,%r17
+ 70: 00 90 74 ba shra %r18,%r19,%r20
+ 74: 00 a8 d7 ba shra %r21,%r22,%r23
+ 78: 00 c0 3f bb shra %r24,%r25,%r31
+ 7c: 00 d8 9d bb shra %r27,%r28,%r29
+ 80: 00 f0 e0 bb shra %r30,%r31,%r0
+ 84: 00 00 22 b0 shrd %r0,%r1,%sp
+ 88: 00 18 85 b0 shrd %fp,%r4,%r5
+ 8c: 00 30 e8 b0 shrd %r6,%r7,%r8
+ 90: 00 48 4b b1 shrd %r9,%r10,%r11
+ 94: 00 f8 ae b1 shrd %r31,%r13,%r14
+ 98: 00 78 11 b2 shrd %r15,%r16,%r17
+ 9c: 00 90 74 b2 shrd %r18,%r19,%r20
+ a0: 00 a8 d7 b2 shrd %r21,%r22,%r23
+ a4: 00 c0 3f b3 shrd %r24,%r25,%r31
+ a8: 00 d8 9d b3 shrd %r27,%r28,%r29
+ ac: 00 f0 e0 b3 shrd %r30,%r31,%r0
+ b0: 00 00 22 a4 shl 0,%r1,%sp
+ b4: 00 20 85 a4 shl 8192,%r4,%r5
+ b8: f5 13 e8 a4 shl 5109,%r7,%r8
+ bc: ff 7f 4b a5 shl 32767,%r10,%r11
+ c0: 00 80 ae a5 shl -32768,%r13,%r14
+ c4: 00 e0 11 a6 shl -8192,%r16,%r17
+ c8: ff ff 74 a6 shl -1,%r19,%r20
+ cc: cd ab d7 a6 shl -21555,%r22,%r23
+ d0: 34 12 3a a7 shl 4660,%r25,%r26
+ d4: 00 00 9d a7 shl 0,%r28,%r29
+ d8: 03 00 e0 a7 shl 3,%r31,%r0
+ dc: 00 00 22 ac shr 0,%r1,%sp
+ e0: 00 20 85 ac shr 8192,%r4,%r5
+ e4: f5 13 e8 ac shr 5109,%r7,%r8
+ e8: ff 7f 4b ad shr 32767,%r10,%r11
+ ec: 00 80 ae ad shr -32768,%r13,%r14
+ f0: 00 e0 11 ae shr -8192,%r16,%r17
+ f4: ff ff 74 ae shr -1,%r19,%r20
+ f8: cd ab d7 ae shr -21555,%r22,%r23
+ fc: 34 12 3a af shr 4660,%r25,%r26
+ 100: 00 00 9d af shr 0,%r28,%r29
+ 104: 03 00 e0 af shr 3,%r31,%r0
+ 108: 01 00 22 bc shra 1,%r1,%sp
+ 10c: 01 20 85 bc shra 8193,%r4,%r5
+ 110: f6 13 e8 bc shra 5110,%r7,%r8
+ 114: ff 7f 4b bd shra 32767,%r10,%r11
+ 118: 00 80 ae bd shra -32768,%r13,%r14
+ 11c: 00 e0 11 be shra -8192,%r16,%r17
+ 120: ff ff 74 be shra -1,%r19,%r20
+ 124: cd ab d7 be shra -21555,%r22,%r23
+ 128: 34 12 3a bf shra 4660,%r25,%r26
+ 12c: 00 00 9d bf shra 0,%r28,%r29
+ 130: 03 00 e0 bf shra 3,%r31,%r0
--- /dev/null
+# shl, shr, shra, shrd
+
+ .text
+
+ # Register forms (all)
+ shl %r0,%r1,%r2
+ shl %r3,%r4,%r5
+ shl %r6,%r7,%r8
+ shl %r9,%r10,%r11
+ shl %r31,%r13,%r14
+ shl %r15,%r16,%r17
+ shl %r18,%r19,%r20
+ shl %r21,%r22,%r23
+ shl %r24,%r25,%r31
+ shl %r27,%r28,%r29
+ shl %r30,%r31,%r0
+
+ shr %r0,%r1,%r2
+ shr %r3,%r4,%r5
+ shr %r6,%r7,%r8
+ shr %r9,%r10,%r11
+ shr %r31,%r13,%r14
+ shr %r15,%r16,%r17
+ shr %r18,%r19,%r20
+ shr %r21,%r22,%r23
+ shr %r24,%r25,%r31
+ shr %r27,%r28,%r29
+ shr %r30,%r31,%r0
+
+ shra %r0,%r1,%r2
+ shra %r3,%r4,%r5
+ shra %r6,%r7,%r8
+ shra %r9,%r10,%r11
+ shra %r31,%r13,%r14
+ shra %r15,%r16,%r17
+ shra %r18,%r19,%r20
+ shra %r21,%r22,%r23
+ shra %r24,%r25,%r31
+ shra %r27,%r28,%r29
+ shra %r30,%r31,%r0
+
+ shrd %r0,%r1,%r2
+ shrd %r3,%r4,%r5
+ shrd %r6,%r7,%r8
+ shrd %r9,%r10,%r11
+ shrd %r31,%r13,%r14
+ shrd %r15,%r16,%r17
+ shrd %r18,%r19,%r20
+ shrd %r21,%r22,%r23
+ shrd %r24,%r25,%r31
+ shrd %r27,%r28,%r29
+ shrd %r30,%r31,%r0
+
+ # Immediate forms (shrd does not have an immediate form)
+ shl 0,%r1,%r2
+ shl 8192,%r4,%r5
+ shl 5109,%r7,%r8
+ shl 32767,%r10,%r11
+ shl -32768,%r13,%r14
+ shl -8192,%r16,%r17
+ shl -1,%r19,%r20
+ shl -21555,%r22,%r23
+ shl 0x1234,%r25,%r26
+ shl 0x0,%r28,%r29
+ shl 0x3,%r31,%r0
+
+ shr 0,%r1,%r2
+ shr 8192,%r4,%r5
+ shr 5109,%r7,%r8
+ shr 32767,%r10,%r11
+ shr -32768,%r13,%r14
+ shr -8192,%r16,%r17
+ shr -1,%r19,%r20
+ shr -21555,%r22,%r23
+ shr 0x1234,%r25,%r26
+ shr 0x0,%r28,%r29
+ shr 0x3,%r31,%r0
+
+ shra 1,%r1,%r2
+ shra 8193,%r4,%r5
+ shra 5110,%r7,%r8
+ shra 32767,%r10,%r11
+ shra -32768,%r13,%r14
+ shra -8192,%r16,%r17
+ shra -1,%r19,%r20
+ shra -21555,%r22,%r23
+ shra 0x1234,%r25,%r26
+ shra 0x0,%r28,%r29
+ shra 0x3,%r31,%r0
+
--- /dev/null
+#as:
+#objdump: -dr
+#name: simd
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+ 0: d7 05 48 48 pfzchkl %f0,%f2,%f8
+ 4: d7 15 90 48 pfzchkl %f2,%f4,%f16
+ 8: d7 25 cd 48 pfzchkl %f4,%f6,%f13
+ c: d7 45 52 49 pfzchkl %f8,%f10,%f18
+ 10: df 65 de 49 pfzchks %f12,%f14,%f30
+ 14: df 85 54 4a pfzchks %f16,%f18,%f20
+ 18: df a5 dc 4a pfzchks %f20,%f22,%f28
+ 1c: df c5 5e 4b pfzchks %f24,%f26,%f30
+ 20: d0 05 48 48 pfaddp %f0,%f2,%f8
+ 24: d0 15 90 48 pfaddp %f2,%f4,%f16
+ 28: d0 25 cd 48 pfaddp %f4,%f6,%f13
+ 2c: d0 45 52 49 pfaddp %f8,%f10,%f18
+ 30: d1 65 de 49 pfaddz %f12,%f14,%f30
+ 34: d1 85 54 4a pfaddz %f16,%f18,%f20
+ 38: d1 a5 dc 4a pfaddz %f20,%f22,%f28
+ 3c: d1 c5 5e 4b pfaddz %f24,%f26,%f30
+ 40: d7 61 44 48 fzchkl %f12,%f2,%f4
+ 44: d7 b1 82 48 fzchkl %f22,%f4,%f2
+ 48: d7 21 d2 48 fzchkl %f4,%f6,%f18
+ 4c: d7 41 5c 49 fzchkl %f8,%f10,%f28
+ 50: df 61 c6 49 fzchks %f12,%f14,%f6
+ 54: df 81 54 4a fzchks %f16,%f18,%f20
+ 58: df a1 dc 4a fzchks %f20,%f22,%f28
+ 5c: df c1 5e 4b fzchks %f24,%f26,%f30
+ 60: d0 61 44 48 faddp %f12,%f2,%f4
+ 64: d0 b1 82 48 faddp %f22,%f4,%f2
+ 68: d0 21 d2 48 faddp %f4,%f6,%f18
+ 6c: d0 41 5c 49 faddp %f8,%f10,%f28
+ 70: d1 61 c6 49 faddz %f12,%f14,%f6
+ 74: d1 81 54 4a faddz %f16,%f18,%f20
+ 78: d1 a1 dc 4a faddz %f20,%f22,%f28
+ 7c: d1 c1 5e 4b faddz %f24,%f26,%f30
+ 80: d7 07 52 48 d.pfzchkl %f0,%f2,%f18
+ 84: 00 00 00 a0 shl %r0,%r0,%r0
+ 88: d7 17 8c 48 d.pfzchkl %f2,%f4,%f12
+ 8c: 00 00 00 a0 shl %r0,%r0,%r0
+ 90: d7 27 de 48 d.pfzchkl %f4,%f6,%f30
+ 94: 00 00 00 a0 shl %r0,%r0,%r0
+ 98: d7 47 44 49 d.pfzchkl %f8,%f10,%f4
+ 9c: 00 00 00 a0 shl %r0,%r0,%r0
+ a0: df 67 ce 49 d.pfzchks %f12,%f14,%f14
+ a4: 00 00 00 a0 shl %r0,%r0,%r0
+ a8: df 87 46 4a d.pfzchks %f16,%f18,%f6
+ ac: 00 00 00 a0 shl %r0,%r0,%r0
+ b0: df a7 ca 4a d.pfzchks %f20,%f22,%f10
+ b4: 00 00 00 a0 shl %r0,%r0,%r0
+ b8: df c7 48 4b d.pfzchks %f24,%f26,%f8
+ bc: 00 00 00 a0 shl %r0,%r0,%r0
+ c0: d0 07 52 48 d.pfaddp %f0,%f2,%f18
+ c4: 00 00 00 a0 shl %r0,%r0,%r0
+ c8: d0 17 80 48 d.pfaddp %f2,%f4,%f0
+ cc: 00 00 00 a0 shl %r0,%r0,%r0
+ d0: d0 27 de 48 d.pfaddp %f4,%f6,%f30
+ d4: 00 00 00 a0 shl %r0,%r0,%r0
+ d8: d0 47 44 49 d.pfaddp %f8,%f10,%f4
+ dc: 00 00 00 a0 shl %r0,%r0,%r0
+ e0: d1 67 ce 49 d.pfaddz %f12,%f14,%f14
+ e4: 00 00 00 a0 shl %r0,%r0,%r0
+ e8: d1 87 46 4a d.pfaddz %f16,%f18,%f6
+ ec: 00 00 00 a0 shl %r0,%r0,%r0
+ f0: d1 a7 ca 4a d.pfaddz %f20,%f22,%f10
+ f4: 00 00 00 a0 shl %r0,%r0,%r0
+ f8: d1 c7 48 4b d.pfaddz %f24,%f26,%f8
+ fc: 00 00 00 a0 shl %r0,%r0,%r0
+ 100: d7 03 4a 48 d.fzchkl %f0,%f2,%f10
+ 104: 00 00 00 a0 shl %r0,%r0,%r0
+ 108: d7 13 92 48 d.fzchkl %f2,%f4,%f18
+ 10c: 00 00 00 a0 shl %r0,%r0,%r0
+ 110: d7 23 cc 48 d.fzchkl %f4,%f6,%f12
+ 114: 00 00 00 a0 shl %r0,%r0,%r0
+ 118: d7 43 4e 49 d.fzchkl %f8,%f10,%f14
+ 11c: 00 00 00 a0 shl %r0,%r0,%r0
+ 120: df 63 d0 49 d.fzchks %f12,%f14,%f16
+ 124: 00 00 00 a0 shl %r0,%r0,%r0
+ 128: df 83 4c 4a d.fzchks %f16,%f18,%f12
+ 12c: 00 00 00 a0 shl %r0,%r0,%r0
+ 130: df a3 d0 4a d.fzchks %f20,%f22,%f16
+ 134: 00 00 00 a0 shl %r0,%r0,%r0
+ 138: df c3 5e 4b d.fzchks %f24,%f26,%f30
+ 13c: 00 00 00 a0 shl %r0,%r0,%r0
+ 140: d0 03 4a 48 d.faddp %f0,%f2,%f10
+ 144: 00 00 00 a0 shl %r0,%r0,%r0
+ 148: d0 13 92 48 d.faddp %f2,%f4,%f18
+ 14c: 00 00 00 a0 shl %r0,%r0,%r0
+ 150: d0 23 cc 48 d.faddp %f4,%f6,%f12
+ 154: 00 00 00 a0 shl %r0,%r0,%r0
+ 158: d0 43 4e 49 d.faddp %f8,%f10,%f14
+ 15c: 00 00 00 a0 shl %r0,%r0,%r0
+ 160: d1 63 d0 49 d.faddz %f12,%f14,%f16
+ 164: 00 00 00 a0 shl %r0,%r0,%r0
+ 168: d1 83 4c 4a d.faddz %f16,%f18,%f12
+ 16c: 00 00 00 a0 shl %r0,%r0,%r0
+ 170: d1 a3 d0 4a d.faddz %f20,%f22,%f16
+ 174: 00 00 00 a0 shl %r0,%r0,%r0
+ 178: d1 c3 5e 4b d.faddz %f24,%f26,%f30
+ 17c: 00 00 00 a0 shl %r0,%r0,%r0
--- /dev/null
+# fzchkl, fzchks, faddp, faddz
+
+ .text
+
+ # Pipelined, without dual bit
+ pfzchkl %f0,%f2,%f8
+ pfzchkl %f2,%f4,%f16
+ pfzchkl %f4,%f6,%f13
+ pfzchkl %f8,%f10,%f18
+
+ pfzchks %f12,%f14,%f30
+ pfzchks %f16,%f18,%f20
+ pfzchks %f20,%f22,%f28
+ pfzchks %f24,%f26,%f30
+
+ pfaddp %f0,%f2,%f8
+ pfaddp %f2,%f4,%f16
+ pfaddp %f4,%f6,%f13
+ pfaddp %f8,%f10,%f18
+
+ pfaddz %f12,%f14,%f30
+ pfaddz %f16,%f18,%f20
+ pfaddz %f20,%f22,%f28
+ pfaddz %f24,%f26,%f30
+
+ # Non-pipelined, without dual bit
+ fzchkl %f12,%f2,%f4
+ fzchkl %f22,%f4,%f2
+ fzchkl %f4,%f6,%f18
+ fzchkl %f8,%f10,%f28
+
+ fzchks %f12,%f14,%f6
+ fzchks %f16,%f18,%f20
+ fzchks %f20,%f22,%f28
+ fzchks %f24,%f26,%f30
+
+ faddp %f12,%f2,%f4
+ faddp %f22,%f4,%f2
+ faddp %f4,%f6,%f18
+ faddp %f8,%f10,%f28
+
+ faddz %f12,%f14,%f6
+ faddz %f16,%f18,%f20
+ faddz %f20,%f22,%f28
+ faddz %f24,%f26,%f30
+
+ # Pipelined, with dual bit
+ d.pfzchkl %f0,%f2,%f18
+ nop
+ d.pfzchkl %f2,%f4,%f12
+ nop
+ d.pfzchkl %f4,%f6,%f30
+ nop
+ d.pfzchkl %f8,%f10,%f4
+ nop
+
+ d.pfzchks %f12,%f14,%f14
+ nop
+ d.pfzchks %f16,%f18,%f6
+ nop
+ d.pfzchks %f20,%f22,%f10
+ nop
+ d.pfzchks %f24,%f26,%f8
+ nop
+
+ d.pfaddp %f0,%f2,%f18
+ nop
+ d.pfaddp %f2,%f4,%f0
+ nop
+ d.pfaddp %f4,%f6,%f30
+ nop
+ d.pfaddp %f8,%f10,%f4
+ nop
+
+ d.pfaddz %f12,%f14,%f14
+ nop
+ d.pfaddz %f16,%f18,%f6
+ nop
+ d.pfaddz %f20,%f22,%f10
+ nop
+ d.pfaddz %f24,%f26,%f8
+ nop
+
+ # Non-pipelined, with dual bit
+ d.fzchkl %f0,%f2,%f10
+ nop
+ d.fzchkl %f2,%f4,%f18
+ nop
+ d.fzchkl %f4,%f6,%f12
+ nop
+ d.fzchkl %f8,%f10,%f14
+ nop
+
+ d.fzchks %f12,%f14,%f16
+ nop
+ d.fzchks %f16,%f18,%f12
+ nop
+ d.fzchks %f20,%f22,%f16
+ nop
+ d.fzchks %f24,%f26,%f30
+ nop
+
+ d.faddp %f0,%f2,%f10
+ nop
+ d.faddp %f2,%f4,%f18
+ nop
+ d.faddp %f4,%f6,%f12
+ nop
+ d.faddp %f8,%f10,%f14
+ nop
+
+ d.faddz %f12,%f14,%f16
+ nop
+ d.faddz %f16,%f18,%f12
+ nop
+ d.faddz %f20,%f22,%f16
+ nop
+ d.faddz %f24,%f26,%f30
+ nop
projects / external / binutils.git / commitdiff